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Toshiharu Furukawa

Toshiharu Furukawa

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
44
Citations
6407
World Ranking
3774
National Ranking
1359

Overview

Toshiharu Furukawa is affiliated with IBM in the United States. Their professional profile indicates a role connected with this major technology corporation, suggesting involvement in research or development activities within such an environment.

Although detailed records of papers, publication venues, co-authors, or specific research topics are not present, the affiliation with IBM implies engagement in applied and possibly interdisciplinary scientific or technological research. The absence of listed publications or co-authors precludes analysis of collaborative networks or detailed areas of subject expertise based on bibliometric data.

There is no available information about awards, recognized contributions, or specific fields and subfields of study related to Toshiharu Furukawa. Similarly, no book publications or frequent publication venues are documented, indicating either a focus on internal corporate research or work that has not been widely disseminated through traditional academic channels.

The absence of information on main topics or specialized fields of study means it is not possible to specify research themes or scientific domains that Toshiharu Furukawa concentrates on. Without such data, any attempt to categorize the scientist's expertise or influence must remain general and cautious, limited to the context of affiliation with a leading technology company.

There is no indication that Toshiharu Furukawa is deceased. The profile is based on currently available data and reflects an active or recent professional status.

Best Publications

  • Effect of Al inclusion in HfO 2 on the physical and electrical properties of the dielectrics

    W.J. Zhu;T. Tamagawa;M. Gibson;T. Furukawa

  • Forming capping layer over metal wire structure using selective atomic layer deposition

    Toshiharu Furukawa;Steven J. Holmes;David V. Horak;Charles W. Koburger

  • Novel structure for folded architecture pillar memory cell

    Furukawa Toshiharu;Hakey Mark C;Holmes Steven J;Horak David

  • SOI hybrid structure with selective epitaxial growth of silicon

    Toshiharu Furukawa;Jack A. Mandelman;Dan Moy;Byeongju Park

  • HfO/sub 2/ and HfAlO for CMOS: thermal stability and current transport

    W. Zhu;T.P. Ma;T. Tamagawa;Y. Di

  • A variable-size shallow trench isolation (STL) technology with diffused sidewall doping for submicron CMOS

    B. Davari;C. Koburger;T. Furukawa;Y. Taur

  • Trench storage dynamic random access memory cell with vertical transfer device

    Toshiharu Furukawa;Mark C. Hakey;David V. Horak;William H. Ma

  • Method for forming quadruple density sidewall image transfer (SIT) structures

    Toshiharu Furukawa;Mark Charles Hakey;Steven John Holmes;David Vaclav Horak

  • High performance low power bulk fet device and method of manufacture

    Jin Cai;Toshiharu Furukawa;Robert R. Robison

  • A new planarization technique, using a combination of RIE and chemical mechanical polish (CMP)

    B. Davarik;C.W. Koburger;R. Schulz;J.D. Warnock

  • Methods of T-gate fabrication using a hybrid resist

    Toshiharu Furukawa;Mark C. Hakey;Steven J. Holmes;David V. Horak

  • Layout and process to contact sub-lithographic structures

    Toshiharu Furukawa;Mark Charles Hakey;Steven J. Holmes;David V. Horak

  • Method for forming pillar memory cells and device formed thereby

    Toshiharu Furukawa;Mark C. Hakey;Steven J. Holmes;David V. Horak

  • Method and equipment for cleaning semiconductor substrate in immersion lithography system

    V Hollack David;Toshiharu Furukawa;Steven J Holmes;C Heiky Mark

  • High resolution dopant/impurity incorporation in semiconductors via a scanned atomic force probe

    Toshiharu Furukawa;John Joseph Ellis-Monaghan;James Albert Slinkman

  • Semiconductor with nanoscale features

    Steven J. Holmes;Charles Black;David J. Frank;Toshiharu Furukawa

  • Method for forming a uniform distribution of nitrogen in silicon oxynitride gate dielectric

    Anthony I. Chou;Michael P. Chudzik;Toshiharu Furukawa;Oleg Gluschenkov

  • Method of independent P and N gate length control of FET device made by sidewall image transfer technique

    Toshiharu Furukawa;Steven J. Holmes;William H-L Ma

  • RESIST IMAGE REVERSAL PROCESS AND INTEGRATED CIRCUIT CHIP THEREOF

    Void Dian C;Furukawa Tosiharu;Homes Steven J;Ma William H

  • Method of manufacturing an integrated ULSI heatsink

    William R. Tonti;Jack A. Mandelman;Jerzy M. Zalesinski;Toshiharu Furukawa

Frequent Co-Authors

Mark C. Hakey
Mark C. Hakey Semivation
Steven J. Holmes
Steven J. Holmes IBM (United States)
David V. Horak
David V. Horak IBM (United States)
Charles W. Koburger
Charles W. Koburger IBM (United States)
Jack A. Mandelman
Jack A. Mandelman Independent Scientist / Consultant, US
William R. Tonti
William R. Tonti Institute of Electrical and Electronics Engineers
Kangguo Cheng
Kangguo Cheng IBM (United States)
Carl J. Radens
Carl J. Radens IBM (United States)
Bruce B. Doris
Bruce B. Doris IBM (United States)
Charles T. Black
Charles T. Black Brookhaven National Laboratory

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