D-Index & Metrics Best Publications

D-Index & Metrics D-index (Discipline H-index) only includes papers and citation values for an examined discipline in contrast to General H-index which accounts for publications across all disciplines.

Discipline name D-index D-index (Discipline H-index) only includes papers and citation values for an examined discipline in contrast to General H-index which accounts for publications across all disciplines. Citations Publications World Ranking National Ranking
Electronics and Electrical Engineering D-index 64 Citations 13,216 311 World Ranking 765 National Ranking 367
Materials Science D-index 67 Citations 13,524 304 World Ranking 2994 National Ranking 908

Overview

What is he best known for?

The fields of study he is best known for:

  • Semiconductor
  • Transistor
  • Electrical engineering

His primary areas of investigation include Optoelectronics, Transistor, Layer, Semiconductor and Substrate. The various areas that Brian S. Doyle examines in his Optoelectronics study include Field-effect transistor, Electronic engineering, Electrical engineering and Gate oxide. While the research belongs to areas of Gate oxide, he spends his time largely on the problem of Gate dielectric, intersecting his research to questions surrounding Semiconductor device and High-κ dielectric.

His Transistor research includes themes of Substrate and Nanotechnology. His study in Layer is interdisciplinary in nature, drawing from both Wafer, Oxide and Dielectric. His biological study deals with issues like Thin film, which deal with fields such as Metal and Integrated circuit.

His most cited work include:

  • Tri-gate devices and methods of fabrication (557 citations)
  • High performance fully-depleted tri-gate CMOS transistors (420 citations)
  • Nonplanar transistors with metal gate electrodes (390 citations)

What are the main themes of his work throughout his whole career to date?

Brian S. Doyle mostly deals with Optoelectronics, Layer, Transistor, Electrical engineering and Substrate. Brian S. Doyle interconnects Electronic engineering, Gate dielectric, Semiconductor device and Gate oxide in the investigation of issues within Optoelectronics. His Layer study integrates concerns from other disciplines, such as Oxide and Perpendicular.

His Transistor research integrates issues from CMOS, Nanotechnology and Integrated circuit. His study in the field of Capacitor, MOSFET, Voltage and Threshold voltage also crosses realms of Fin. His Substrate study incorporates themes from Trench, Silicon and Dielectric.

He most often published in these fields:

  • Optoelectronics (74.57%)
  • Layer (40.59%)
  • Transistor (32.76%)

What were the highlights of his more recent work (between 2017-2020)?

  • Optoelectronics (74.57%)
  • Layer (40.59%)
  • Transistor (32.76%)

In recent papers he was focusing on the following fields of study:

Optoelectronics, Layer, Transistor, Integrated circuit and Oxide are his primary areas of study. The Optoelectronics study combines topics in areas such as Electrical conductor, Tunnel magnetoresistance and Substrate. His research integrates issues of Spin-transfer torque, Perpendicular, Magnet and Voltage in his study of Layer.

His biological study spans a wide range of topics, including Terminal, Static random-access memory and Electronics. His Integrated circuit research is multidisciplinary, incorporating perspectives in Field-effect transistor, Thin film and Insulator. In his study, Logic gate, High speed memory, Gate oxide and Epitaxy is inextricably linked to Semiconductor, which falls within the broad field of Ferroelectricity.

Between 2017 and 2020, his most popular works were:

  • MRAM as Embedded Non-Volatile Memory Solution for 22FFL FinFET Technology (63 citations)
  • DOUBLE SELECTOR ELEMENT FOR LOW VOLTAGE BIPOLAR MEMORY DEVICES (2 citations)
  • PROTECTION LAYERS FOR MAGNETIC TUNNEL JUNCTIONS (2 citations)

This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.

Best Publications

High performance fully-depleted tri-gate CMOS transistors

B.S. Doyle;S. Datta;M. Doczy;S. Hareland.
IEEE Electron Device Letters (2003)

652 Citations

Nonplanar transistors with metal gate electrodes

Justin K. Brask;Brian S. Doyle;Mark L. Doczy;Robert S. Chau.
(2004)

607 Citations

TRI-GATE DEVICE AND MANUFACTURING METHOD

Chau Robert;Doyle Brian;Kavalieros Jack;Barlage Douglas.
(2017)

560 Citations

Fabrication of deep submicron structures and quantum wire transistors using hard-mask transistor width definition

Brian S. Doyle;Peng Cheng.
(2000)

471 Citations

Methodology for control of short channel effects in MOS transistors

Brian S. Doyle;Brian Roberds.
(2001)

461 Citations

Integrated nanoelectronics for the future

Robert Chau;Brian Doyle;Suman Datta;Jack Kavalieros.
Nature Materials (2007)

438 Citations

Method of forming a nonplanar transistor with sidewall spacers

Justin K. Brask;Brian S. Doyle;Jack Kavalieros;Mark Doczy.
(2009)

385 Citations

Block Contact Architectures for Nanoscale Channel Transistors

Marko Radosavljevic;Amlan Majumdar;Brian S. Doyle;Jack Kavalieros.
(2005)

333 Citations

Floating-body dynamic random access memory and method of fabrication in tri-gate technology

Stephen H. Tang;Ali Keshavarzi;Dinesh Somasekhar;Fabrice Paillet.
(2006)

320 Citations

Self-aligned contacts for transistors

Peter L. D. Chang;Brian S. Doyle.
(2005)

319 Citations

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