Jeffrey W. Sleight

What is he best known for?

The fields of study he is best known for:

• Semiconductor
• Transistor
• Electrical engineering

His main research concerns Optoelectronics, Nanowire, Electrical engineering, Layer and Nanotechnology. His research investigates the connection between Optoelectronics and topics such as Field-effect transistor that intersect with problems in Insulator. His work carried out in the field of Nanowire brings together such families of science as Capacitance, Wafer, Inverter and Doping.

His Layer research includes elements of Threshold voltage, Transistor and Gate stack. He studied CMOS and Node that intersect with Integrated circuit layout. His Silicon on insulator research integrates issues from Metal gate and Logic gate.

His most cited work include:

• Stable SRAM cell design for the 32 nm node and beyond (531 citations)
• High performance and highly uniform gate-all-around silicon nanowire MOSFETs with wire size dependent scaling (199 citations)
• High-performance cmos soi device on hybrid crystal-oriented substrates (176 citations)

What are the main themes of his work throughout his whole career to date?

His primary areas of study are Optoelectronics, Electrical engineering, Nanowire, Layer and Field-effect transistor. The study incorporates disciplines such as Gate dielectric, Electronic engineering and Gate oxide in addition to Optoelectronics. When carried out as part of a general Electrical engineering research project, his work on Transistor, CMOS, Gate stack and Static random-access memory is frequently linked to work in Communication channel, therefore connecting diverse disciplines of study.

Jeffrey W. Sleight combines subjects such as Wafer, Semiconductor and Epitaxy with his study of Nanowire. His work in the fields of Layer, such as Substrate, Semiconductor device and Etching, overlaps with other areas such as Conformal map. His Field-effect transistor study incorporates themes from Semiconductor materials, Substrate, Doping and Integrated circuit.

He most often published in these fields:

• Optoelectronics (83.91%)
• Electrical engineering (40.23%)
• Nanowire (36.02%)

What were the highlights of his more recent work (between 2013-2017)?

• Optoelectronics (83.91%)
• Nanowire (36.02%)
• Layer (30.65%)

In recent papers he was focusing on the following fields of study:

His primary areas of investigation include Optoelectronics, Nanowire, Layer, Wafer and Nanotechnology. The study incorporates disciplines such as Field-effect transistor, Electronic engineering and Substrate, Gate oxide in addition to Optoelectronics. To a larger extent, Jeffrey W. Sleight studies Electrical engineering with the aim of understanding Field-effect transistor.

His Layer research is multidisciplinary, incorporating perspectives in Silicon on insulator, Bipolar junction transistor and Germanium. His Wafer research incorporates themes from Trench and Doping. His Nanotechnology study integrates concerns from other disciplines, such as Electron beam processing and Transistor.

Between 2013 and 2017, his most popular works were:

• Investigating surface loss effects in superconducting transmon qubits (55 citations)
• Local germanium condensation for suspended nanowire and finFET devices (13 citations)
• Stacked planar double-gate lamellar field-effect transistor (12 citations)

In his most recent research, the most cited papers focused on:

• Semiconductor
• Transistor
• Integrated circuit

Jeffrey W. Sleight mostly deals with Optoelectronics, Nanowire, Layer, Wafer and Nanotechnology. His Optoelectronics study combines topics from a wide range of disciplines, such as Field-effect transistor, Electronic engineering, Electrical engineering and Gate oxide. His Electronic engineering research includes themes of Silicon and Dielectric.

The various areas that Jeffrey W. Sleight examines in his Gate oxide study include Gate dielectric and CMOS. His studies deal with areas such as Semiconductor device and Semiconductor as well as Nanowire. His Nanotechnology research is multidisciplinary, relying on both Band gap and Insulator.