His primary scientific interests are in Optoelectronics, Layer, Semiconductor device, Electronic engineering and Substrate. The various areas that Ruilong Xie examines in his Optoelectronics study include Fin, Transistor, Gate oxide and Electrical engineering. Ruilong Xie works mostly in the field of Layer, limiting it down to topics relating to Semiconductor materials and, in certain cases, Isolation.
In his study, which falls under the umbrella issue of Semiconductor device, Insulation layer and Mechanical engineering is strongly linked to Structural engineering. His Electronic engineering study also includes fields such as
His main research concerns Optoelectronics, Layer, Transistor, Semiconductor device and Dielectric. His Optoelectronics research integrates issues from Fin, Substrate, Electronic engineering and Substrate. His study in Layer is interdisciplinary in nature, drawing from both Electrical conductor and Fin.
His work carried out in the field of Transistor brings together such families of science as Nanosheet, Epitaxy and Integrated circuit. The Semiconductor device study combines topics in areas such as Semiconductor materials, Structural engineering, Dielectric layer and Etching. His Gate oxide study results in a more complete grasp of Electrical engineering.
Ruilong Xie spends much of his time researching Optoelectronics, Transistor, Layer, Dielectric and Semiconductor. A large part of his Optoelectronics studies is devoted to Integrated circuit. His Transistor research includes themes of Fin, Pillar, Substrate and Epitaxy.
Many of his studies on Layer involve topics that are commonly interrelated, such as Electrical conductor. His Dielectric study combines topics in areas such as Parasitic capacitance, Trench and Composite material. His research investigates the link between Semiconductor and topics such as Insulator that cross with problems in Perpendicular.
Ruilong Xie mainly focuses on Optoelectronics, Layer, Transistor, Semiconductor device and Nanosheet. His Optoelectronics research incorporates themes from Field-effect transistor, Trench and Self-aligned gate. Metal gate, Semiconductor structure and Substrate are the primary areas of interest in his Layer study.
His Transistor study integrates concerns from other disciplines, such as AND gate and Air gap. His study looks at the relationship between AND gate and fields such as Integrated circuit, as well as how they intersect with chemical problems. The study incorporates disciplines such as Electrical conductor, Fin, Etching and Base in addition to Semiconductor device.
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Semiconductor device with low-K spacers
Xiuyu Cai;Ruilong Xie;Xunyuan Zhang.
Integrated circuits and methods for fabricating integrated circuits with reduced parasitic capacitance
Ruilong Xie;Xiuyu Cai;Xunyuan Zhang.
Silicide protection during contact metallization and resulting semiconductor structures
Vimal K. Kamineni;Ruilong Xie;Robert Miller.
Multi-channel gate-all-around FET
Qing Liu;Ruilong Xie;Chun-Chen Yeh;Xiuyu Cai.
A 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels
R. Xie;P. Montanini;K. Akarvardar;N. Tripathi.
international electron devices meeting (2016)
Integrated circuits including finfet devices and methods for fabricating the same
Ruilong Xie;Xiuyu Cai;Ali Khakifirooz;Kangguo Cheng.
Finfet semiconductor devices with improved source/drain resistance
Ruilong Xie;Mark Raymond;Robert Miller.
High-k gate stack on germanium substrate with fluorine incorporation
Ruilong Xie;Mingbin Yu;Mei Ying Lai;Lap Chan.
Applied Physics Letters (2008)
Effects of Sulfur Passivation on Germanium MOS Capacitors With HfON Gate Dielectric
Ruilong Xie;Chunxiang Zhu.
IEEE Electron Device Letters (2007)
A 10nm platform technology for low power and high performance application featuring FINFET devices with multi workfunction gate stack on bulk and SOI
K. I. Seo;B. Haran;D. Gupta;D. Guo.
symposium on vlsi technology (2014)
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