H-Index & Metrics Top Publications

H-Index & Metrics

Discipline name H-index Citations Publications World Ranking National Ranking
Electronics and Electrical Engineering H-index 104 Citations 44,054 889 World Ranking 36 National Ranking 21

Research.com Recognitions

Awards & Achievements

2002 - IEEE Fellow For contributions to the power-aware design of digital circuits.

Overview

What is he best known for?

The fields of study he is best known for:

  • Artificial intelligence
  • Quantum mechanics
  • Electrical engineering

Kaushik Roy focuses on Electronic engineering, CMOS, Transistor, Electrical engineering and Electronic circuit. His studies deal with areas such as Threshold voltage, Low-power electronics and Leakage as well as Electronic engineering. His research in CMOS intersects with topics in Power, Process variation, Voltage, Integrated circuit and Integrated injection logic.

His Transistor study combines topics in areas such as Optoelectronics and Nanoelectronics. His research in Electrical engineering tackles topics such as Spin-transfer torque which are related to areas like Torque. In his research on the topic of Electronic circuit, Benchmark is strongly related with Algorithm.

His most cited work include:

  • Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits (1851 citations)
  • Gated-V/sub dd/: a circuit technique to reduce leakage in deep-submicron cache memories (677 citations)
  • Modeling of failure probability and statistical design of SRAM array for yield enhancement in nanoscaled CMOS (432 citations)

What are the main themes of his work throughout his whole career to date?

Kaushik Roy mainly focuses on Electronic engineering, CMOS, Electrical engineering, Artificial intelligence and Electronic circuit. His Electronic engineering research integrates issues from Transistor, Voltage, Low-power electronics and Leakage. In his study, Cache is inextricably linked to Static random-access memory, which falls within the broad field of Leakage.

His CMOS study combines topics from a wide range of disciplines, such as Power, Integrated circuit design and Process variation. His Artificial intelligence research includes themes of Machine learning and Pattern recognition. His biological study spans a wide range of topics, including Very-large-scale integration and Circuit design.

He most often published in these fields:

  • Electronic engineering (44.07%)
  • CMOS (23.79%)
  • Electrical engineering (20.07%)

What were the highlights of his more recent work (between 2018-2021)?

  • Artificial intelligence (15.29%)
  • Artificial neural network (9.36%)
  • Spiking neural network (6.36%)

In recent papers he was focusing on the following fields of study:

His primary areas of study are Artificial intelligence, Artificial neural network, Spiking neural network, Deep learning and Pattern recognition. Kaushik Roy interconnects Computer architecture, Edge device, Contextual image classification, Multiplication and Efficient energy use in the investigation of issues within Artificial neural network. As a member of one scientific family, Kaushik Roy mostly works in the field of Efficient energy use, focusing on Energy and, on occasion, CMOS.

His study in Spiking neural network is interdisciplinary in nature, drawing from both Gradient descent, Neuromorphic engineering, Spike and Neuron. His work deals with themes such as Adversarial system, Bottleneck and Electronic engineering, which intersect with Robustness. His work deals with themes such as Spin-transfer torque and Torque, which intersect with Electronic engineering.

Between 2018 and 2021, his most popular works were:

  • Going Deeper in Spiking Neural Networks: VGG and Residual Architectures. (167 citations)
  • Towards spike-based machine intelligence with neuromorphic computing. (163 citations)
  • PUMA: A Programmable Ultra-efficient Memristor-based Accelerator for Machine Learning Inference (97 citations)

In his most recent research, the most cited papers focused on:

  • Artificial intelligence
  • Quantum mechanics
  • Electrical engineering

His main research concerns Artificial intelligence, Artificial neural network, Spiking neural network, Pattern recognition and Machine learning. Kaushik Roy has included themes like Crossbar switch, Spike, Non-volatile memory, Residual and Efficient energy use in his Artificial neural network study. The Spiking neural network study combines topics in areas such as Gradient descent, Neuromorphic engineering, MNIST database and Neuron.

The concepts of his CMOS study are interwoven with issues in Matrix multiplication and Resistive random-access memory. Kaushik Roy integrates many fields in his works, including Input/output and Electronic engineering. His Electronic engineering research includes themes of Mixed-signal integrated circuit, Noise power and Leakage.

This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.

Top Publications

Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits

K. Roy;S. Mukhopadhyay;H. Mahmoodi-Meimand.
Proceedings of the IEEE (2003)

2682 Citations

Gated-V/sub dd/: a circuit technique to reduce leakage in deep-submicron cache memories

Michael Powell;Se-Hyun Yang;Babak Falsafi;Kaushik Roy.
international symposium on low power electronics and design (2000)

1072 Citations

Low-Power CMOS VLSI Circuit Design

Kaushik Roy;Sharat Prasad.
(2000)

881 Citations

Low-Power Digital Signal Processing Using Approximate Adders

V. Gupta;D. Mohapatra;A. Raghunathan;K. Roy.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2013)

553 Citations

Modeling of failure probability and statistical design of SRAM array for yield enhancement in nanoscaled CMOS

S. Mukhopadhyay;H. Mahmoodi;K. Roy.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2005)

551 Citations

A 32 kb 10T Sub-Threshold SRAM Array With Bit-Interleaving and Differential Read Scheme in 90 nm CMOS

Ik Joon Chang;Jae-Joon Kim;S.P. Park;K. Roy.
IEEE Journal of Solid-state Circuits (2009)

524 Citations

A 32kb 10T Subthreshold SRAM Array with Bit-Interleaving and Differential Read Scheme in 90nm CMOS

Ik Joon Chang;Jae-Joon Kim;S.P. Park;K. Roy.
international solid-state circuits conference (2008)

518 Citations

Estimation of standby leakage power in CMOS circuits considering accurate modeling of transistor stacks

Zhanping Chen;Mark Johnson;Liqiong Wei;Kaushik Roy.
international symposium on low power electronics and design (1998)

474 Citations

A 160 mV Robust Schmitt Trigger Based Subthreshold SRAM

J.P. Kulkarni;K. Kim;K. Roy.
IEEE Journal of Solid-state Circuits (2007)

459 Citations

IMPACT: imprecise adders for low-power approximate computing

Vaibhav Gupta;Debabrata Mohapatra;Sang Phill Park;Anand Raghunathan.
international symposium on low power electronics and design (2011)

432 Citations

Profile was last updated on December 6th, 2021.
Research.com Ranking is based on data retrieved from the Microsoft Academic Graph (MAG).
The ranking h-index is inferred from publications deemed to belong to the considered discipline.

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