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Electronics and Electrical Engineering
USA
2026

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
124
Citations
63612
World Ranking
52
National Ranking
29

Research.com Recognitions

  • 2026 - Research.com Electronics and Electrical Engineering in United States Leader Award
  • 2025 - Research.com Electronics and Electrical Engineering in United States Leader Award
  • 2002 - IEEE Fellow For contributions to the power-aware design of digital circuits.

Overview

Kaushik Roy is affiliated with Purdue University West Lafayette in the United States. Their research spans primarily the field of Computer Science, with a substantial focus across several subfields including Computer Vision and Pattern Recognition, Artificial Intelligence, Signal Processing, Media Technology, and Information Systems.

Their work covers various main topics, including Handwritten Text Recognition Techniques, Vehicle License Plate Recognition, Music and Audio Processing, Advanced Malware Detection Techniques, Biometric Identification and Security, Face Recognition and Analysis, and Network Security and Intrusion Detection.

Among recent published papers are:

  • Deep neural network to detect COVID-19: one architecture for both CT Scans and Chest X-rays, 2020, Applied Intelligence
  • Using a Long Short-Term Memory Recurrent Neural Network (LSTM-RNN) to Classify Network Attacks, 2020, Information
  • Shallow Convolutional Neural Network for COVID-19 Outbreak Screening Using Chest X-rays, 2021, Cognitive Computation
  • Text categorization: past and present, 2020, Artificial Intelligence Review
  • An Investigation of Biometric Authentication in the Healthcare Environment, 2020, Array

Frequent co-authors include Sk Md Obaidullah, Himadri Mukherjee, Ankita Dhar, KC Santosh, and Mridul Ghosh. These collaborations reflect a productive network within their research community.

Kaushik Roy has published extensively in various venues. The most frequent publication venues are:

  • arXiv (Cornell University) with 25 publications
  • Multimedia Tools and Applications with 12 publications
  • Journal of Marine Medical Society with 7 publications
  • Future Internet with 5 publications
  • 2021 IEEE Symposium Series on Computational Intelligence (SSCI) with 3 publications

Their contributions to the power-aware design of digital circuits were recognized with the IEEE Fellow award in 2002.

Best Publications

  • Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits

    K. Roy;S. Mukhopadhyay;H. Mahmoodi-Meimand

  • Gated-V/sub dd/: a circuit technique to reduce leakage in deep-submicron cache memories

    Michael Powell;Se-Hyun Yang;Babak Falsafi;Kaushik Roy

  • Low-Power Digital Signal Processing Using Approximate Adders

    V. Gupta;D. Mohapatra;A. Raghunathan;K. Roy

  • Low power CMOS VLSI circuit design

    Kaushik Roy;Sharat Prasad

  • Going Deeper in Spiking Neural Networks: VGG and Residual Architectures.

    Abhronil Sengupta;Yuting Ye;Robert Wang;Chiao Liu

  • A 32 kb 10T Sub-Threshold SRAM Array With Bit-Interleaving and Differential Read Scheme in 90 nm CMOS

    Ik Joon Chang;Jae-Joon Kim;S.P. Park;K. Roy

  • Analysis and characterization of inherent application resilience for approximate computing

    Vinay K. Chippa;Srimat T. Chakradhar;Kaushik Roy;Anand Raghunathan

  • A 160 mV Robust Schmitt Trigger Based Subthreshold SRAM

    J.P. Kulkarni;K. Kim;K. Roy

  • Modeling of failure probability and statistical design of SRAM array for yield enhancement in nanoscaled CMOS

    S. Mukhopadhyay;H. Mahmoodi;K. Roy

  • A 32kb 10T Subthreshold SRAM Array with Bit-Interleaving and Differential Read Scheme in 90nm CMOS

    Ik Joon Chang;Jae-Joon Kim;S.P. Park;K. Roy

  • IMPACT: imprecise adders for low-power approximate computing

    Vaibhav Gupta;Debabrata Mohapatra;Sang Phill Park;Anand Raghunathan

  • Estimation of standby leakage power in CMOS circuits considering accurate modeling of transistor stacks

    Zhanping Chen;Mark Johnson;Liqiong Wei;Kaushik Roy

  • Medium-scale carbon nanotube thin-film integrated circuits on flexible plastic substrates

    Qing Cao;Hoon-sik Kim;Ninad Pimparkar;Jaydeep P. Kulkarni

  • Design and optimization of dual-threshold circuits for low-voltage low-power applications

    L. Wei;Z. Chen;K. Roy;M.C. Johnson

  • SALSA: systematic logic synthesis of approximate circuits

    Swagath Venkataramani;Amit Sabne;Vivek Kozhikkottu;Kaushik Roy

  • Leakage control with efficient use of transistor stacks in single threshold CMOS

    M.C. Johnson;D. Somasekhar;Lih-Yih Chiou;K. Roy

  • Robust subthreshold logic for ultra-low power operation

    Hendrawan Soeleman;Kaushik Roy;Bipul C. Paul

  • Impact of NBTI on the temporal performance degradation of digital circuits

    B.C. Paul;Kunhyuk Kang;H. Kufluoglu;M.A. Alam

  • Carbon-nanotube-based voltage-mode multiple-valued logic design

    A. Raychowdhury;K. Roy

  • Reducing set-associative cache energy via way-prediction and selective direct-mapping

    Michael D. Powell;Amit Agarwal;T. N. Vijaykumar;Babak Falsafi

  • An integrated circuit/architecture approach to reducing leakage in deep-submicron high-performance I-caches

    S. Yang;M.D. Powell;B. Falsafi;K. Roy

Frequent Co-Authors

Anand Raghunathan
Anand Raghunathan Purdue University West Lafayette
Saibal Mukhopadhyay
Saibal Mukhopadhyay Georgia Institute of Technology
Arijit Raychowdhury
Arijit Raychowdhury Georgia Institute of Technology
Swarup Bhunia
Swarup Bhunia University of Florida
Hamid Mahmoodi
Hamid Mahmoodi San Francisco State University
Bipul C. Paul
Bipul C. Paul GlobalFoundries (United States)
Sumeet Kumar Gupta
Sumeet Kumar Gupta Purdue University West Lafayette
Cheng-Kok Koh
Cheng-Kok Koh Purdue University West Lafayette
Swagath Venkataramani
Swagath Venkataramani IBM (United States)
Deliang Fan
Deliang Fan Johns Hopkins University

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Related Online Degrees & Career Pathways

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Many graduate programs now embrace competency based masters degrees, allowing students to progress based on skill mastery rather than time spent in class. This model is particularly advantageous for engineers seeking advanced credentials while balancing professional responsibilities.

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