His primary areas of study are Optoelectronics, Transistor, High-κ dielectric, Metal gate and Work function. His Optoelectronics research includes elements of Field-effect transistor, Logic gate, Electrical engineering, Layer and MOSFET. His work carried out in the field of Transistor brings together such families of science as Electron mobility and Quantum tunnelling.
His High-κ dielectric research integrates issues from Threshold voltage, Capacitance, Annealing and Condensed matter physics. In his work, Wide-bandgap semiconductor is strongly intertwined with Gate dielectric, which is a subfield of Metal gate. His work in Work function addresses issues such as Dielectric, which are connected to fields such as Electronic engineering, Oxide and Analytical chemistry.
Prashant Majhi mainly investigates Optoelectronics, MOSFET, High-κ dielectric, Metal gate and Electronic engineering. His studies deal with areas such as Field-effect transistor, Transistor, Gate dielectric and Electrical engineering as well as Optoelectronics. His research integrates issues of Capacitance, Condensed matter physics and Passivation in his study of Field-effect transistor.
His MOSFET research includes themes of Electron mobility, Silicon-germanium, Silicon, Germanium and Threshold voltage. His High-κ dielectric research incorporates themes from Analytical chemistry, Tin, Equivalent oxide thickness and Atomic layer deposition. The Metal gate study combines topics in areas such as PMOS logic, Work function and Leakage.
Optoelectronics, Transistor, Layer, Electrical engineering and MOSFET are his primary areas of study. His CMOS study in the realm of Optoelectronics connects with subjects such as Communication channel. His studies deal with areas such as Barrier layer, Semiconductor device, Semiconductor and Integrated circuit as well as Transistor.
His Electrical engineering research includes themes of Dram, Substrate and Quantum tunnelling. He has researched MOSFET in several fields, including Metal gate, Electron mobility, Doping, Field-effect transistor and Silicon on insulator. His Metal gate research incorporates elements of Silicon and Dopant.
Prashant Majhi mainly investigates Optoelectronics, Resistive random-access memory, Electrical engineering, Oxide and Layer. His Optoelectronics research incorporates themes from Transistor, MOSFET, Electronic engineering and Nanotechnology. His work is dedicated to discovering how Transistor, Thermal oxidation are connected with Barrier layer and Dopant and other disciplines.
His research in MOSFET intersects with topics in Metal gate, Silicon on insulator, Electron mobility and Doping. Prashant Majhi combines subjects such as High-κ dielectric, Tin and Silicon with his study of Electron mobility. His Electronic engineering study which covers Thin film that intersects with Work function and Ohmic contact.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
Forming a type i heterostructure in a group iv semiconductor
Chi On Chui;Prashant Majhi;Wilman Tsai;Jack T. Kavalieros.
(2007)
Forming a type i heterostructure in a group iv semiconductor
Chi On Chui;Prashant Majhi;Wilman Tsai;Jack T. Kavalieros.
(2007)
Si tunnel transistors with a novel silicided source and 46mV/dec swing
Kanghoon Jeon;Wei-Yip Loh;Pratik Patel;Chang Yong Kang.
symposium on vlsi technology (2010)
Si tunnel transistors with a novel silicided source and 46mV/dec swing
Kanghoon Jeon;Wei-Yip Loh;Pratik Patel;Chang Yong Kang.
symposium on vlsi technology (2010)
Dipole model explaining high-k/metal gate field effect transistor threshold voltage tuning
P. D. Kirsch;P. Sivasubramani;J. Huang;C. D. Young.
Applied Physics Letters (2008)
Dipole model explaining high-k/metal gate field effect transistor threshold voltage tuning
P. D. Kirsch;P. Sivasubramani;J. Huang;C. D. Young.
Applied Physics Letters (2008)
Wafer-scale, sub-5 nm junction formation by monolayer doping and conventional spike annealing.
Johnny C. Ho;Roie Yerushalmi;Gregory Smith;Prashant Majhi.
Nano Letters (2009)
Wafer-scale, sub-5 nm junction formation by monolayer doping and conventional spike annealing.
Johnny C. Ho;Roie Yerushalmi;Gregory Smith;Prashant Majhi.
Nano Letters (2009)
Work function engineering using lanthanum oxide interfacial layers
H. N. Alshareef;M. Quevedo-Lopez;H. C. Wen;R. Harris.
Applied Physics Letters (2006)
Work function engineering using lanthanum oxide interfacial layers
H. N. Alshareef;M. Quevedo-Lopez;H. C. Wen;R. Harris.
Applied Physics Letters (2006)
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