D-Index & Metrics Best Publications

D-Index & Metrics D-index (Discipline H-index) only includes papers and citation values for an examined discipline in contrast to General H-index which accounts for publications across all disciplines.

Discipline name D-index D-index (Discipline H-index) only includes papers and citation values for an examined discipline in contrast to General H-index which accounts for publications across all disciplines. Citations Publications World Ranking National Ranking
Electronics and Electrical Engineering D-index 33 Citations 4,328 261 World Ranking 4219 National Ranking 1588

Overview

What is he best known for?

The fields of study he is best known for:

  • Semiconductor
  • Transistor
  • Integrated circuit

His primary areas of study are Optoelectronics, Transistor, High-κ dielectric, Metal gate and Work function. His Optoelectronics research includes elements of Field-effect transistor, Logic gate, Electrical engineering, Layer and MOSFET. His work carried out in the field of Transistor brings together such families of science as Electron mobility and Quantum tunnelling.

His High-κ dielectric research integrates issues from Threshold voltage, Capacitance, Annealing and Condensed matter physics. In his work, Wide-bandgap semiconductor is strongly intertwined with Gate dielectric, which is a subfield of Metal gate. His work in Work function addresses issues such as Dielectric, which are connected to fields such as Electronic engineering, Oxide and Analytical chemistry.

His most cited work include:

  • Forming a type i heterostructure in a group iv semiconductor (166 citations)
  • Si tunnel transistors with a novel silicided source and 46mV/dec swing (157 citations)
  • Dipole model explaining high-k/metal gate field effect transistor threshold voltage tuning (141 citations)

What are the main themes of his work throughout his whole career to date?

Prashant Majhi mainly investigates Optoelectronics, MOSFET, High-κ dielectric, Metal gate and Electronic engineering. His studies deal with areas such as Field-effect transistor, Transistor, Gate dielectric and Electrical engineering as well as Optoelectronics. His research integrates issues of Capacitance, Condensed matter physics and Passivation in his study of Field-effect transistor.

His MOSFET research includes themes of Electron mobility, Silicon-germanium, Silicon, Germanium and Threshold voltage. His High-κ dielectric research incorporates themes from Analytical chemistry, Tin, Equivalent oxide thickness and Atomic layer deposition. The Metal gate study combines topics in areas such as PMOS logic, Work function and Leakage.

He most often published in these fields:

  • Optoelectronics (77.51%)
  • MOSFET (32.18%)
  • High-κ dielectric (33.22%)

What were the highlights of his more recent work (between 2011-2020)?

  • Optoelectronics (77.51%)
  • Transistor (15.22%)
  • Layer (12.46%)

In recent papers he was focusing on the following fields of study:

Optoelectronics, Transistor, Layer, Electrical engineering and MOSFET are his primary areas of study. His CMOS study in the realm of Optoelectronics connects with subjects such as Communication channel. His studies deal with areas such as Barrier layer, Semiconductor device, Semiconductor and Integrated circuit as well as Transistor.

His Electrical engineering research includes themes of Dram, Substrate and Quantum tunnelling. He has researched MOSFET in several fields, including Metal gate, Electron mobility, Doping, Field-effect transistor and Silicon on insulator. His Metal gate research incorporates elements of Silicon and Dopant.

Between 2011 and 2020, his most popular works were:

  • (110) and (100) Sidewall-oriented FinFETs: A performance and reliability investigation (24 citations)
  • Impact of Fin Doping and Gate Stack on FinFET (110) and (100) Electron and Hole Mobilities (18 citations)
  • Thermally Robust Ni Germanide Technology Using Cosputtering of Ni and Pt for High-Performance Nanoscale Ge MOSFETs (13 citations)

In his most recent research, the most cited papers focused on:

  • Semiconductor
  • Transistor
  • Integrated circuit

Prashant Majhi mainly investigates Optoelectronics, Resistive random-access memory, Electrical engineering, Oxide and Layer. His Optoelectronics research incorporates themes from Transistor, MOSFET, Electronic engineering and Nanotechnology. His work is dedicated to discovering how Transistor, Thermal oxidation are connected with Barrier layer and Dopant and other disciplines.

His research in MOSFET intersects with topics in Metal gate, Silicon on insulator, Electron mobility and Doping. Prashant Majhi combines subjects such as High-κ dielectric, Tin and Silicon with his study of Electron mobility. His Electronic engineering study which covers Thin film that intersects with Work function and Ohmic contact.

This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.

Best Publications

Forming a type i heterostructure in a group iv semiconductor

Chi On Chui;Prashant Majhi;Wilman Tsai;Jack T. Kavalieros.
(2007)

255 Citations

Forming a type i heterostructure in a group iv semiconductor

Chi On Chui;Prashant Majhi;Wilman Tsai;Jack T. Kavalieros.
(2007)

255 Citations

Si tunnel transistors with a novel silicided source and 46mV/dec swing

Kanghoon Jeon;Wei-Yip Loh;Pratik Patel;Chang Yong Kang.
symposium on vlsi technology (2010)

211 Citations

Si tunnel transistors with a novel silicided source and 46mV/dec swing

Kanghoon Jeon;Wei-Yip Loh;Pratik Patel;Chang Yong Kang.
symposium on vlsi technology (2010)

211 Citations

Dipole model explaining high-k/metal gate field effect transistor threshold voltage tuning

P. D. Kirsch;P. Sivasubramani;J. Huang;C. D. Young.
Applied Physics Letters (2008)

199 Citations

Dipole model explaining high-k/metal gate field effect transistor threshold voltage tuning

P. D. Kirsch;P. Sivasubramani;J. Huang;C. D. Young.
Applied Physics Letters (2008)

199 Citations

Wafer-scale, sub-5 nm junction formation by monolayer doping and conventional spike annealing.

Johnny C. Ho;Roie Yerushalmi;Gregory Smith;Prashant Majhi.
Nano Letters (2009)

167 Citations

Wafer-scale, sub-5 nm junction formation by monolayer doping and conventional spike annealing.

Johnny C. Ho;Roie Yerushalmi;Gregory Smith;Prashant Majhi.
Nano Letters (2009)

167 Citations

Work function engineering using lanthanum oxide interfacial layers

H. N. Alshareef;M. Quevedo-Lopez;H. C. Wen;R. Harris.
Applied Physics Letters (2006)

129 Citations

Work function engineering using lanthanum oxide interfacial layers

H. N. Alshareef;M. Quevedo-Lopez;H. C. Wen;R. Harris.
Applied Physics Letters (2006)

129 Citations

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