World's Best Scientists 2026 revealed!

D-Index & Metrics

Discipline name D-Index World Ranking Current World Ranking National Ranking Current National Ranking Publications Citations
Electronics and Electrical Engineering 90 302 293 146 139 389 24410
Materials Science 92 1555 1493 485 453 390 25112

Robert S. Chau publications per year

The chart shows the history of publications by Robert S. Chau between 1991 and 2021, highlighting the no. of papers published in each year and offering an overview of the publication velocity of this scholar. Robert S. Chau published across 31 years, from 1991 to 2021, averaging 14.8 papers a year. Output peaked at 64 publications in 2005. 4 of the 460 publications appeared in the last two years.

No. of publications
20 40 60
Bar chart. Horizontal axis: year, 1991 to 2021. Vertical axis: number of publications, 0 to 64. Peak 64 publications in 2005. 1991: 1 publication 1992: 1 publication 1993: 1 publication 1994: 1 publication 1995: 2 publications 1996: 3 publications 1997: 7 publications 1998: 8 publications 1999: 6 publications 2000: 7 publications 2001: 3 publications 2002: 4 publications 2003: 40 publications 2004: 50 publications 2005: 64 publications 2006: 40 publications 2007: 22 publications 2008: 25 publications 2009: 16 publications 2010: 22 publications 2011: 25 publications 2012: 5 publications 2013: 38 publications 2014: 25 publications 2015: 10 publications 2016: 4 publications 2017: 8 publications 2018: 13 publications 2019: 5 publications 2020: 3 publications 2021: 1 publication
1991 2021

460 publications in total across all disciplines

View publications per year as a table
Robert S. Chau: publications per year, 1991 to 2021
Year Publications
1991 1
1992 1
1993 1
1994 1
1995 2
1996 3
1997 7
1998 8
1999 6
2000 7
2001 3
2002 4
2003 40
2004 50
2005 64
2006 40
2007 22
2008 25
2009 16
2010 22
2011 25
2012 5
2013 38
2014 25
2015 10
2016 4
2017 8
2018 13
2019 5
2020 3
2021 1
Total 460
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Robert S. Chau publication distribution in Electronics and Electrical Engineering in 2026

The chart shows the distribution of publications by all Research.com ranked scientists in the field of Electronics and Electrical Engineering in 2026. The highlighted bar marks where Robert S. Chau sits on this spectrum.

No. of scientists
100 200 300 400
Bar chart with 53 bars. Horizontal axis: publications, 34–53 to 1,065+. Vertical axis: number of scientists, 0 to 445. Most scientists, 445, have 174–193 publications. The last bar groups every scientist with 1,065 publications or more. The highlighted bar, 374–393 publications, is where this scientist sits. 34–53 publications: 24 scientists 54–73 publications: 52 scientists 74–93 publications: 114 scientists 94–113 publications: 203 scientists 114–133 publications: 269 scientists 134–153 publications: 355 scientists 154–173 publications: 403 scientists 174–193 publications: 445 scientists 194–213 publications: 430 scientists 214–233 publications: 431 scientists 234–253 publications: 399 scientists 254–273 publications: 366 scientists 274–293 publications: 335 scientists 294–313 publications: 300 scientists 314–333 publications: 276 scientists 334–353 publications: 250 scientists 354–373 publications: 214 scientists 374–393 publications: 187 scientists 394–413 publications: 152 scientists 414–433 publications: 169 scientists 434–453 publications: 147 scientists 454–473 publications: 111 scientists 474–493 publications: 117 scientists 494–513 publications: 103 scientists 514–533 publications: 99 scientists 534–553 publications: 92 scientists 554–573 publications: 75 scientists 574–593 publications: 58 scientists 594–613 publications: 69 scientists 614–633 publications: 50 scientists 634–653 publications: 62 scientists 654–673 publications: 54 scientists 674–693 publications: 44 scientists 694–713 publications: 37 scientists 714–733 publications: 28 scientists 734–753 publications: 26 scientists 754–773 publications: 26 scientists 774–793 publications: 19 scientists 794–813 publications: 23 scientists 814–833 publications: 20 scientists 834–853 publications: 16 scientists 854–873 publications: 20 scientists 874–893 publications: 11 scientists 894–913 publications: 11 scientists 914–933 publications: 16 scientists 934–953 publications: 13 scientists 954–973 publications: 10 scientists 974–993 publications: 11 scientists 994–1,013 publications: 9 scientists 1,014–1,033 publications: 9 scientists 1,034–1,053 publications: 10 scientists 1,054–1,064 publications: 6 scientists 1,065+ publications: 99 scientists
34–53 publications 1,065+

This scientist: 389 publications — 73rd percentile

73% of scientists in this discipline score the same or lower.

The last bar groups every scientist with 1,065 publications or more.

View publications distribution as a table
Number of Electronics and Electrical Engineering scientists by publication count, Research.com 2026 ranking edition. Based on 6,875 ranked scientists.
Publications Scientists This scientist
34–53 24
54–73 52
74–93 114
94–113 203
114–133 269
134–153 355
154–173 403
174–193 445
194–213 430
214–233 431
234–253 399
254–273 366
274–293 335
294–313 300
314–333 276
334–353 250
354–373 214
374–393 187 389
394–413 152
414–433 169
434–453 147
454–473 111
474–493 117
494–513 103
514–533 99
534–553 92
554–573 75
574–593 58
594–613 69
614–633 50
634–653 62
654–673 54
674–693 44
694–713 37
714–733 28
734–753 26
754–773 26
774–793 19
794–813 23
814–833 20
834–853 16
854–873 20
874–893 11
894–913 11
914–933 16
934–953 13
954–973 10
974–993 11
994–1,013 9
1,014–1,033 9
1,034–1,053 10
1,054–1,064 6
1,065+ 99
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Robert S. Chau D-index placement in Electronics and Electrical Engineering in 2026

The chart shows the D-index (discipline H-index) distribution of Electronics and Electrical Engineering scientists ranked by Research.com in 2026. The highlighted bar marks where Robert S. Chau sits on this spectrum.

No. of scientists
50 100 150 200 250
Bar chart with 82 bars. Horizontal axis: D-Index, 30 to 111+. Vertical axis: number of scientists, 0 to 263. Most scientists, 263, have 32 D-Index. The last bar groups every scientist with 111 D-Index or more. The highlighted bar, 90 D-Index, is where this scientist sits. 30 D-Index: 178 scientists 31 D-Index: 257 scientists 32 D-Index: 263 scientists 33 D-Index: 262 scientists 34 D-Index: 244 scientists 35 D-Index: 236 scientists 36 D-Index: 211 scientists 37 D-Index: 220 scientists 38 D-Index: 214 scientists 39 D-Index: 214 scientists 40 D-Index: 205 scientists 41 D-Index: 187 scientists 42 D-Index: 194 scientists 43 D-Index: 201 scientists 44 D-Index: 155 scientists 45 D-Index: 189 scientists 46 D-Index: 148 scientists 47 D-Index: 160 scientists 48 D-Index: 134 scientists 49 D-Index: 130 scientists 50 D-Index: 141 scientists 51 D-Index: 156 scientists 52 D-Index: 108 scientists 53 D-Index: 130 scientists 54 D-Index: 112 scientists 55 D-Index: 97 scientists 56 D-Index: 111 scientists 57 D-Index: 102 scientists 58 D-Index: 108 scientists 59 D-Index: 120 scientists 60 D-Index: 103 scientists 61 D-Index: 93 scientists 62 D-Index: 92 scientists 63 D-Index: 74 scientists 64 D-Index: 77 scientists 65 D-Index: 73 scientists 66 D-Index: 64 scientists 67 D-Index: 69 scientists 68 D-Index: 60 scientists 69 D-Index: 39 scientists 70 D-Index: 57 scientists 71 D-Index: 59 scientists 72 D-Index: 46 scientists 73 D-Index: 49 scientists 74 D-Index: 38 scientists 75 D-Index: 35 scientists 76 D-Index: 32 scientists 77 D-Index: 35 scientists 78 D-Index: 31 scientists 79 D-Index: 22 scientists 80 D-Index: 34 scientists 81 D-Index: 31 scientists 82 D-Index: 34 scientists 83 D-Index: 23 scientists 84 D-Index: 18 scientists 85 D-Index: 30 scientists 86 D-Index: 19 scientists 87 D-Index: 19 scientists 88 D-Index: 20 scientists 89 D-Index: 8 scientists 90 D-Index: 17 scientists 91 D-Index: 7 scientists 92 D-Index: 14 scientists 93 D-Index: 9 scientists 94 D-Index: 15 scientists 95 D-Index: 10 scientists 96 D-Index: 12 scientists 97 D-Index: 10 scientists 98 D-Index: 10 scientists 99 D-Index: 12 scientists 100 D-Index: 16 scientists 101 D-Index: 5 scientists 102 D-Index: 7 scientists 103 D-Index: 7 scientists 104 D-Index: 8 scientists 105 D-Index: 9 scientists 106 D-Index: 13 scientists 107 D-Index: 4 scientists 108 D-Index: 5 scientists 109 D-Index: 10 scientists 110 D-Index: 8 scientists 111+ D-Index: 96 scientists
30 D-Index 111+

This scientist: 90 D-Index — 96th percentile

96% of scientists in this discipline score the same or lower.

The last bar groups every scientist with 111 D-Index or more.

View D-Index distribution as a table
Number of Electronics and Electrical Engineering scientists by D-index, Research.com 2026 ranking edition. Based on 6,875 ranked scientists.
D-Index Scientists This scientist
30 178
31 257
32 263
33 262
34 244
35 236
36 211
37 220
38 214
39 214
40 205
41 187
42 194
43 201
44 155
45 189
46 148
47 160
48 134
49 130
50 141
51 156
52 108
53 130
54 112
55 97
56 111
57 102
58 108
59 120
60 103
61 93
62 92
63 74
64 77
65 73
66 64
67 69
68 60
69 39
70 57
71 59
72 46
73 49
74 38
75 35
76 32
77 35
78 31
79 22
80 34
81 31
82 34
83 23
84 18
85 30
86 19
87 19
88 20
89 8
90 17 90
91 7
92 14
93 9
94 15
95 10
96 12
97 10
98 10
99 12
100 16
101 5
102 7
103 7
104 8
105 9
106 13
107 4
108 5
109 10
110 8
111+ 96
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Research.com Recognitions

  • 2013 - Member of the National Academy of Engineering For contributions to CMOS transistor technologies for advanced logic products.
  • 2012 - IEEE Jun-ichi Nishizawa Medal “For sustained leadership in developing innovative transistor technologies for advanced logic products.”

Overview

What is he best known for?

The fields of study he is best known for:

  • Semiconductor
  • Transistor
  • Optoelectronics

Robert S. Chau mainly investigates Optoelectronics, Layer, Transistor, Gate dielectric and Substrate. His Optoelectronics research includes elements of Metal gate, Gate oxide, Semiconductor device and Electronic engineering. His study looks at the relationship between Layer and topics such as Oxide, which overlap with Oxide thin-film transistor.

The concepts of his Transistor study are interwoven with issues in CMOS, Nanotechnology, Silicon and Communication channel. His biological study spans a wide range of topics, including Field-effect transistor and High-κ dielectric. His work deals with themes such as Barrier layer, Metal and Germanium, which intersect with Substrate.

His most cited work include:

  • Semiconductor transistor having a stressed channel (402 citations)
  • Nonplanar transistors with metal gate electrodes (390 citations)
  • Integrated nanoelectronics for the future (294 citations)

What are the main themes of his work throughout his whole career to date?

His primary areas of investigation include Optoelectronics, Layer, Transistor, Substrate and Gate oxide. His research in Optoelectronics intersects with topics in Metal gate, Electronic engineering, Gate dielectric and Electrical engineering. The study incorporates disciplines such as High-κ dielectric and Dielectric in addition to Gate dielectric.

His work in the fields of Semiconductor device, Trench and Epitaxy overlaps with other areas such as Fin. His Transistor research incorporates themes from Nanowire, Nanotechnology, Silicon, Communication channel and CMOS. His Substrate study combines topics from a wide range of disciplines, such as Barrier layer and Germanium.

He most often published in these fields:

  • Optoelectronics (74.25%)
  • Layer (41.30%)
  • Transistor (33.18%)

What were the highlights of his more recent work (between 2013-2020)?

  • Optoelectronics (74.25%)
  • Layer (41.30%)
  • Transistor (33.18%)

In recent papers he was focusing on the following fields of study:

Optoelectronics, Layer, Transistor, Substrate and Silicon are his primary areas of study. His study on Semiconductor is often connected to Stack as part of broader study in Optoelectronics. His research in Semiconductor tackles topics such as Integrated circuit which are related to areas like Substrate.

Robert S. Chau works mostly in the field of Layer, limiting it down to topics relating to Perpendicular and, in certain cases, Analytical chemistry. His work carried out in the field of Transistor brings together such families of science as Gallium nitride, Nanotechnology, Breakdown voltage, Trench and Crystal structure. His studies in Silicon integrate themes in fields like Barrier layer, CMOS, Buffer and Microelectromechanical systems.

Between 2013 and 2020, his most popular works were:

  • Silicon germanium and germanium multigate and nanowire structures for logic and multilevel memory applications (66 citations)
  • III-N material structure for gate-recessed transistors (35 citations)
  • Perpendicular spin transfer torque memory (sttm) device with enhanced stability and method to form same (29 citations)

In his most recent research, the most cited papers focused on:

  • Semiconductor
  • Transistor
  • Integrated circuit

Robert S. Chau mostly deals with Optoelectronics, Layer, Transistor, Electrical engineering and Stack. His Optoelectronics research includes themes of Oxide, Substrate and Resistive random-access memory. His Substrate research is multidisciplinary, incorporating elements of Semiconductor device, Aspect ratio, Second source and Silicon-germanium.

Robert S. Chau has included themes like Die and Memory cell in his Layer study. His Transistor research is multidisciplinary, relying on both Gallium nitride, Nanotechnology, Semiconductor, Etching and Thermal expansion. His Dielectric research is multidisciplinary, incorporating perspectives in Barrier layer, Gate dielectric, High-electron-mobility transistor and Gate oxide.

Best Publications

  • A 45nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging

    K. Mistry;C. Allen;C. Auth;B. Beattie

  • A logic nanotechnology featuring strained-silicon

    S.E. Thompson;M. Armstrong;C. Auth;S. Cea

  • High performance fully-depleted tri-gate CMOS transistors

    B.S. Doyle;S. Datta;M. Doczy;S. Hareland

  • Nonplanar transistors with metal gate electrodes

    Justin K. Brask;Brian S. Doyle;Mark L. Doczy;Robert S. Chau

  • Semiconductor transistor having a stressed channel

    Anand Murthy;Robert S. Chau;Tahir Ghani;Kaizad R. Mistry

  • Integrated nanoelectronics for the future

    Robert Chau;Brian Doyle;Suman Datta;Jack Kavalieros

  • Fabrication, characterization, and physics of III–V heterojunction tunneling Field Effect Transistors (H-TFET) for steep sub-threshold swing

    G. Dewey;B. Chu-Kung;J. Boardman;J. M. Fastenau

  • Semiconductor device and integrated circuit structure

    Rachmady Willy;Pillarisetty Ravi;Le Van H;Kavalieros Jack T

  • Method of forming a nonplanar transistor with sidewall spacers

    Justin K. Brask;Brian S. Doyle;Jack Kavalieros;Mark Doczy

  • Tri-Gate fully-depleted CMOS transistors: fabrication, design and layout

    B. Doyle;B. Boyanov;S. Datta;M. Doczy

  • Block Contact Architectures for Nanoscale Channel Transistors

    Marko Radosavljevic;Amlan Majumdar;Brian S. Doyle;Jack Kavalieros

  • Tri-Gate Transistor Architecture with High-k Gate Dielectrics, Metal Gates and Strain Engineering

    J. Kavalieros;B. Doyle;S. Datta;G. Dewey

  • Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode

    Justin K. Brask;Jack Kavalieros;Mark L. Doczy;Uday Shah

  • Tri-gate transistor device with stress incorporation layer and method of fabrication

    Scott A. Hareland;Robert S. Chau;Brian S. Doyle;Suman Datta

  • MOS transistor structure and method of fabrication

    Anand Murthy;Robert S. Chau;Patrick Morrow

  • Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication

    Scott A. Hareland;Robert S. Chau;Brian S. Doyle;Rafael Rios

  • A 50 nm depleted-substrate CMOS transistor (DST)

    R. Chau;J. Kavalieros;B. Doyle;A. Murthy

  • Method for making a semiconductor device having a high-k gate dielectric

    Mark L. Doczy;Gilbert Dewey;Suman Datta;Sangwoo Pae

  • CMOS devices with a single work function gate electrode and method of fabrication

    Brian S. Doyle;Been-Yih Jin;Jack T. Kavalieros;Suman Datta

  • Method of fabricating a MOS transistor having a composite gate electrode

    Chau Robert S;Fraser David B;Cadien Kenneth C;Raghavan Gopal

  • Metal surface treatments for uniformly growing dielectric layers

    Gilbert Dewey;Matthew V. Metz;Jack Kavalieros;Robert S. Chau

Frequent Co-Authors

Brian S. Doyle
Brian S. Doyle Intel (United States)
Suman Datta
Suman Datta Georgia Institute of Technology
Justin K. Brask
Justin K. Brask Intel (United States)
Mark L. Doczy
Mark L. Doczy Intel (United States)
Uday Shah
Uday Shah Intel (United States)
Marko Radosavljevic
Marko Radosavljevic Intel (United States)
Anand S. Murthy
Anand S. Murthy Intel (United States)
Mantu K. Hudait
Mantu K. Hudait Virginia Tech
Prashant Majhi
Prashant Majhi Intel (United States)
Dinesh Somasekhar
Dinesh Somasekhar Intel (United States)

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