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D-Index & Metrics

Electronics and Electrical Engineering

D-Index
32
Citations
4779
World Ranking
6265
National Ranking
2067

Overview

Elyse Rosenbaum is affiliated with the University of Illinois at Urbana-Champaign in the United States. Their research primarily spans the fields of Engineering and Computer Science, with a focus on Electrical and Electronic Engineering and related subfields such as Artificial Intelligence, Statistical and Nonlinear Physics, Hardware and Architecture, and Numerical Analysis.

Their scientific contributions cover several main topics including Electrostatic Discharge in Electronics, Integrated Circuits and Semiconductor Failure Analysis, Electromagnetic Compatibility and Noise Suppression, Model Reduction and Neural Networks, Neural Networks and Applications, Numerical Methods for Differential Equations, and Physical Unclonable Functions (PUFs) and Hardware Security.

Rosenbaum has authored publications in a range of peer-reviewed venues, notably:

  • IEEE Transactions on Electromagnetic Compatibility
  • IEEE Transactions on Electron Devices
  • IEEE Transactions on Microwave Theory and Techniques
  • 2022 IEEE International Reliability Physics Symposium (IRPS)
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Recent papers authored or co-authored by Rosenbaum include:

  • "Compact Models for Simulation of On-Chip ESD Protection Networks" (2023), published in IEEE Transactions on Electron Devices
  • "Neural Ordinary Differential Equation Models of Circuits: Capabilities and Pitfalls" (2022), published in IEEE Transactions on Microwave Theory and Techniques
  • "Analysis of System-Level ESD-Induced Soft Failures in a CMOS Microcontroller" (2020), published in IEEE Transactions on Electromagnetic Compatibility
  • "Statistical Learning of IC Models for System-Level ESD Simulation" (2021), published in IEEE Transactions on Electromagnetic Compatibility
  • "A High Voltage Tolerant Supply Clamp for ESD Protection in a 45-nm SOI Technology" (2022), presented at the 2022 IEEE International Reliability Physics Symposium (IRPS)

Rosenbaum's frequent co-authors include Maxim Raginsky, Shudong Huang, Jie Xiong, Matthew Drallmeier, and Yujie Zhou. Collaboration patterns highlight work in areas intersecting with electrostatic discharge phenomena and system-level failure analysis in integrated circuits.

Best Publications

  • Analytic model for direct tunneling current in polycrystalline silicon-gate metal–oxide–semiconductor devices

    Leonard F. Register;Elyse Rosenbaum;Kevin Yang;Kevin Yang

  • Berkeley reliability tools-BERT

    R.H. Tu;E. Rosenbaum;W.Y. Chan;C.C. Li

  • Mechanism of stress-induced leakage current in MOS capacitors

    E. Rosenbaum;L.F. Register

  • ILLIADS-T: an electrothermal timing simulator for temperature-sensitive reliability diagnosis of CMOS VLSI chips

    Yi-Kan Cheng;P. Raha;Chin-Chi Teng;E. Rosenbaum

  • Interconnect thermal modeling for accurate simulation of circuit timing and reliability

    Danqing Chen;Erhong Li;E. Rosenbaum;Sung-Mo Kang

  • Breakdown and latent damage of ultra-thin gate oxides under ESD stress conditions

    Jie Wu;Patrick Juliano;Elyse Rosenbaum

  • iTEM: a temperature-dependent electromigration reliability diagnosis tool

    Chin-Chi Teng;Yi-Kan Cheng;E. Rosenbaum;Sung-Mo Kang

  • On the mechanism for interface trap generation in MOS transistors due to channel hot carrier stressing

    Zhi Chen;Karl Hess;Jinju Lee;J.W. Lyding

  • Breakdown and latent damage of ultra-thin gate oxides under ESD stress conditions

    J. Wu;P. Juliano;E. Rosenbaum

  • A compact, timed-shutoff, MOSFET-based power clamp for on-chip ESD protection

    Junjun Li;R. Gauthier;E. Rosenbaum

  • Silicon dioxide breakdown lifetime enhancement under bipolar bias conditions

    E. Rosenbaum;Z. Liu;C. Hu

  • Trap-assisted tunneling current through ultra-thin oxide

    J. Wu;L.F. Register;E. Rosenbaum

  • Study of Design Factors Affecting Turn-on Time of Silicon Controlled Rectifiers (SCRS) in 90 and 65nm Bulk CMOS Technologies

    James Sarro;Kiran Chatty;Robert Gauthier;Elyse Rosenbaum

  • Compact modeling of on-chip ESD protection devices using Verilog-A

    Junjun Li;S. Joshi;R. Barnes;E. Rosenbaum

  • A bidirectional NMOSFET current reduction model for simulation of hot-carrier-induced circuit degradation

    K.N. Quader;C.C. Li;R. Tu;E. Rosenbaum

  • Accelerated testing of SiO/sub 2/ reliability

    E. Rosenbaum;J.C. King;J.C. King;Chenming Hu;Chenming Hu

  • Gate oxide reliability under ESD-like pulse stress

    Jie Wu;E. Rosenbaum

  • Diode-Triggered Silicon-Controlled Rectifier With Reduced Voltage Overshoot for CDM ESD Protection

    Wen-Yi Chen;E. Rosenbaum;M. Ker

  • Evaluation of SCR-Based ESD Protection Devices in 90nm and 65nm CMOS Technologies

    J. Di Sarro;K. Chatty;R. Gauthier;E. Rosenbaum

  • High-frequency time-dependent breakdown of SiO/sub 2/

    E. Rosenbaum;C. Hu

  • Cancellation technique to provide ESD protection for multi-GHz RF inputs

    S. Hyvonen;S. Joshi;E. Rosenbaum

Frequent Co-Authors

Sung-Mo Kang
Sung-Mo Kang University of California, Santa Cruz
Chenming Hu
Chenming Hu University of California, Berkeley
Ping-Keung Ko
Ping-Keung Ko Hong Kong University of Science and Technology
Naresh R. Shanbhag
Naresh R. Shanbhag University of Illinois at Urbana-Champaign
David L. Harame
David L. Harame IBM (United States)
Alvin J. Joseph
Alvin J. Joseph GlobalFoundries (United States)
Andreas C. Cangellaris
Andreas C. Cangellaris University of Illinois at Urbana-Champaign
Souvik Mahapatra
Souvik Mahapatra Indian Institute of Technology Bombay
Steven H. Voldman
Steven H. Voldman Independent Scientist / Consultant, US
Bernard S. Meyerson
Bernard S. Meyerson IBM (United States)

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