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Michael Nicolaidis

Michael Nicolaidis

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
41
Citations
8782
World Ranking
4229
National Ranking
72

Overview

Michael Nicolaidis is affiliated with the TIMA Laboratory in France. Their research is situated within the broad field of Engineering, with a specialization in Electrical and Electronic Engineering.

Their scholarly work has primarily addressed topics related to semiconductor technologies and electronic systems. Key areas of focus include:

  • Semiconductor materials and devices
  • Radiation Effects in Electronics
  • Advanced Memory and Neural Computing
  • Advancements in Semiconductor Devices and Circuit Design

Michael Nicolaidis has contributed to the scientific community through publications in peer-reviewed venues. Notably, their work appears in the IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Their recent publication history includes the following paper:

  • "Reducing Power Dissipation in Memory Repair for High Fault Rates," 2023, IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Collaboration has been an element of their research efforts. Frequent coauthors include:

  • Panagiota Papavramidou
  • Lorena Anghel

This cooperation reflects interdisciplinary and multi-author approaches common in their research domain, particularly in studies related to VLSI systems and memory technologies.

Best Publications

  • Upset hardened memory design for submicron CMOS technology

    T. Calin;M. Nicolaidis;R. Velazco

  • Time redundancy based soft-error tolerance to rescue nanometer technologies

    M. Nicolaidis

  • Design for soft error mitigation

    M. Nicolaidis

  • On-Line Testing for VLSI—A Compendium of Approaches

    M. Nicolaidis;Y. Zorian

  • Soft Errors in Modern Electronic Systems

    Michael Nicolaidis

  • Cost reduction and evaluation of a temporary faults detecting technique

    Lorena Anghel;Michael Nicolaidis

  • Embedded robustness IPs for transient-error-free ICs

    E. Dupont;M. Nicolaidis;P. Rohr

  • Carry checking/parity prediction adders and ALUs

    M. Nicolaidis

  • Evaluation of a Soft Error Tolerance Technique Based on Time and/or Space Redundancy

    L. Anghel;D. Alexandrescu;M. Nicolaidis

  • An SFS Berger check prediction ALU and its application to self-checking processor designs

    J.-C. Lo;S. Thanawastien;T.R.N. Rao;M. Nicolaidis

  • SEU-tolerant SRAM design based on current monitoring

    F. Vargas;M. Nicolaidis

  • Theory of transparent BIST for RAMs

    M. Nicolaidis

  • Efficient implementations of self-checking adders and ALUs

    M. Nicolaidis

  • TRANSPARENT BIST FOR RAMS

    M. Nicolaidis

  • Strongly code disjoint checkers

    M. Nicolaidis;B. Courtois

  • Low-Cost Highly-Robust Hardened Cells Using Blocking Feedback Transistors

    M. Nicolaidis;R. Perez;D. Alexandrescu

  • Fault-secure parity prediction arithmetic operators

    M. Nicolaidis;R.O. Duarte;S. Manich;J. Figueras

  • New methods for evaluating the impact of single event transients in VDSM ICs

    D. Alexandrescu;L. Anghel;M. Nicolaidis

  • An Efficient BICS Design for SEUs Detection and Correction in Semiconductor Memories

    Balkaran Gill;Michael Nicolaidis;Francis Wolff;Chris Papachristou

  • Self-exercising checkers for unified built-in self-test (UBIST)

    M. Nicolaidis

Frequent Co-Authors

Pierre Jarron
Pierre Jarron European Organization for Nuclear Research
Jacob A. Abraham
Jacob A. Abraham The University of Texas at Austin
Alessandro Paccagnella
Alessandro Paccagnella University of Padua
Vivek De
Vivek De Intel (United States)
Tanay Karnik
Tanay Karnik Intel (United States)
James W. Tschanz
James W. Tschanz Intel (United States)
Muhammad M. Khellah
Muhammad M. Khellah Intel (United States)
Wojciech Maly
Wojciech Maly Carnegie Mellon University
Yiorgos Makris
Yiorgos Makris The University of Texas at Dallas

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