His primary areas of study are Electronic engineering, CMOS, Single event upset, Electrical engineering and Charge sharing. The Electronic engineering study combines topics in areas such as Radiation hardening, Electronic circuit and Transient. His research on CMOS concerns the broader Optoelectronics.
As part of his studies on Single event upset, he frequently links adjacent subjects like Voltage. His study in the field of Bipolar junction transistor, Sense amplifier and Sense is also linked to topics like Cross section and Virus detection. His Charge sharing research is multidisciplinary, incorporating perspectives in Node and Semiconductor device modeling.
His main research concerns Electronic engineering, CMOS, Optoelectronics, Electrical engineering and Soft error. His Electronic engineering research is multidisciplinary, incorporating elements of Electronic circuit, Transient and Voltage. His studies deal with areas such as PMOS logic, Integrated circuit design, Radiation hardening and Charge sharing as well as CMOS.
Bharat L. Bhuva combines subjects such as Threshold voltage, Transistor, Bipolar junction transistor, Irradiation and Alpha particle with his study of Optoelectronics. His work on Integrated circuit and Inverter as part of general Electrical engineering study is frequently linked to Event, therefore connecting diverse disciplines of science. His Soft error research is multidisciplinary, relying on both Neutron, Scaling and Flip-flop.
Bharat L. Bhuva mainly focuses on Voltage, Optoelectronics, Node, Electronic engineering and Soft error. His Voltage research incorporates elements of Range, Absorbed dose, Irradiation and Transient. His Optoelectronics research is multidisciplinary, incorporating perspectives in Transistor, Current, Flip-flop and FLOPS.
His work deals with themes such as Alpha particle, Noise and CMOS, which intersect with Flip-flop. His research integrates issues of Electronic circuit, Logic gate and Reliability in his study of Node. His studies deal with areas such as Topology and Voltage divider as well as Electronic engineering.
The scientist’s investigation covers issues in Logic gate, Upset, Electronic circuit, Sequential logic and Electronic engineering. His Electronic circuit study combines topics from a wide range of disciplines, such as Node and Computational physics. His study looks at the relationship between Sequential logic and fields such as Voltage, as well as how they intersect with chemical problems.
Soft error is the focus of his Electronic engineering research. His Soft error study deals with Transient intersecting with Threshold voltage. His study focuses on the intersection of Transistor and fields such as Single event upset with connections in the field of Irradiation.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
Charge Collection and Charge Sharing in a 130 nm CMOS Technology
O.A. Amusan;A.F. Witulski;L.W. Massengill;B.L. Bhuva.
IEEE Transactions on Nuclear Science (2006)
Characterization of Digital Single Event Transient Pulse-Widths in 130-nm and 90-nm CMOS Technologies
B. Narasimham;B.L. Bhuva;R.D. Schrimpf;L.W. Massengill.
IEEE Transactions on Nuclear Science (2007)
Single-Event Transient Pulse Quenching in Advanced CMOS Logic Circuits
J.R. Ahlbin;L.W. Massengill;B.L. Bhuva;B. Narasimham.
IEEE Transactions on Nuclear Science (2009)
Neutron- and Proton-Induced Single Event Upsets for D- and DICE-Flip/Flop Designs at a 40 nm Technology Node
T D Loveless;S Jagannathan;T Reece;J Chetia.
IEEE Transactions on Nuclear Science (2011)
On-Chip Characterization of Single-Event Transient Pulsewidths
B. Narasimham;V. Ramachandran;B.L. Bhuva;R.D. Schrimpf.
IEEE Transactions on Device and Materials Reliability (2006)
RHBD techniques for mitigating effects of single-event hits using guard-gates
A. Balasubramanian;B.L. Bhuva;J.D. Black;L.W. Massengill.
IEEE Transactions on Nuclear Science (2005)
Comparison of Combinational and Sequential Error Rates for a Deep Submicron Process
N. N. Mahatme;S. Jagannathan;T. D. Loveless;L. W. Massengill.
IEEE Transactions on Nuclear Science (2011)
Single Event Upsets in Deep-Submicrometer Technologies Due to Charge Sharing
O.A. Amusan;L.W. Massengill;M.P. Baze;A.L. Sternberg.
IEEE Transactions on Device and Materials Reliability (2008)
Analysis of single-event effects in combinational logic-simulation of the AM2901 bitslice processor
L.W. Massengill;A.E. Baranski;D.O. Van Nort;J. Meng.
IEEE Transactions on Nuclear Science (2000)
Mitigation Techniques for Single-Event-Induced Charge Sharing in a 90-nm Bulk CMOS Process
O.A. Amusan;L.W. Massengill;M.P. Baze;B.L. Bhuva.
IEEE Transactions on Device and Materials Reliability (2009)
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