D-Index & Metrics Best Publications
Hans-Joachim Wunderlich

Hans-Joachim Wunderlich

D-Index & Metrics D-index (Discipline H-index) only includes papers and citation values for an examined discipline in contrast to General H-index which accounts for publications across all disciplines.

Discipline name D-index D-index (Discipline H-index) only includes papers and citation values for an examined discipline in contrast to General H-index which accounts for publications across all disciplines. Citations Publications World Ranking National Ranking
Electronics and Electrical Engineering D-index 35 Citations 7,451 234 World Ranking 3633 National Ranking 118
Computer Science D-index 35 Citations 7,610 272 World Ranking 7466 National Ranking 355

Overview

What is he best known for?

The fields of study he is best known for:

  • Operating system
  • Algorithm
  • Electrical engineering

His primary areas of study are Built-in self-test, Automatic test pattern generation, Fault coverage, Algorithm and Test compression. His Built-in self-test study incorporates themes from Overhead and Parallel computing. His study on Automatic test pattern generation is covered under Fault.

His Fault coverage research is multidisciplinary, incorporating elements of Design for testing, Sequential logic, Chip and Test strategy. His Algorithm research integrates issues from Electronic circuit, Fault detection and isolation, Self test, Function and Test set. His study in Test compression is interdisciplinary in nature, drawing from both Test data, Pseudorandom number generator and Scan chain.

His most cited work include:

  • Minimized power consumption for scan-based BIST (240 citations)
  • Bit-flipping BIST (218 citations)
  • Pattern generation for a deterministic BIST scheme (145 citations)

What are the main themes of his work throughout his whole career to date?

His primary scientific interests are in Automatic test pattern generation, Fault coverage, Embedded system, Algorithm and Built-in self-test. His Automatic test pattern generation study combines topics in areas such as Design for testing, Electronic engineering and Benchmark. His Fault coverage study combines topics from a wide range of disciplines, such as Electronic circuit, Overhead, Reliability engineering and Stuck-at fault, Fault detection and isolation.

His studies in Embedded system integrate themes in fields like Fault tolerance, Redundancy and Debugging. Algorithm is often connected to Test set in his work. Hans-Joachim Wunderlich interconnects System testing, Real-time computing, Computer engineering and Parallel computing in the investigation of issues within Built-in self-test.

He most often published in these fields:

  • Automatic test pattern generation (26.32%)
  • Fault coverage (25.26%)
  • Embedded system (23.16%)

What were the highlights of his more recent work (between 2013-2021)?

  • Embedded system (23.16%)
  • Fault (14.74%)
  • Fault tolerance (13.33%)

In recent papers he was focusing on the following fields of study:

Hans-Joachim Wunderlich mostly deals with Embedded system, Fault, Fault tolerance, Reliability engineering and Electronic circuit. His Embedded system research is multidisciplinary, incorporating perspectives in Redundancy, Hardware security module, Debugging and Dependability. His is involved in several facets of Fault study, as is seen by his studies on Automatic test pattern generation and Fault coverage.

The Automatic test pattern generation study combines topics in areas such as Algorithm and Built-in self-test. His Fault tolerance research is multidisciplinary, relying on both Overhead, Reliability, Parallel computing, Conjugate gradient method and Error detection and correction. Hans-Joachim Wunderlich works mostly in the field of Electronic circuit, limiting it down to concerns involving CMOS and, occasionally, Logic level.

Between 2013 and 2021, his most popular works were:

  • Fine-Grained Access Management in Reconfigurable Scan Networks (31 citations)
  • Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience (25 citations)
  • FAST-BIST: Faster-than-at-Speed BIST targeting hidden delay defects (24 citations)

In his most recent research, the most cited papers focused on:

  • Operating system
  • Algorithm
  • Electrical engineering

His primary areas of investigation include Embedded system, Reliability, Fault, Automatic test pattern generation and Fault tolerance. His work on Field-programmable gate array as part of general Embedded system study is frequently linked to Key, bridging the gap between disciplines. He has included themes like Electronic circuit and Logic gate in his Fault study.

His Automatic test pattern generation study integrates concerns from other disciplines, such as Built-in self-test, Fault coverage, Classification methods, Algorithm and Machine learning. His Algorithm research incorporates elements of Test compression and Test set. His work in Fault tolerance tackles topics such as Overhead which are related to areas like Parallel computing and Scalability.

This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.

Best Publications

Minimized Power Consumption for Scan-Based BIST

Stefan Gerstendörfer;Hans-Joachim Wunderlich.
Journal of Electronic Testing (2000)

1019 Citations

Multiple distributions for biased random test patterns

H.-J. Wunderlich.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1990)

498 Citations

A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters

Sybille Hellebrand;Hua-Guo Liang;Hans-Joachim Wunderlich.
Journal of Electronic Testing (2001)

360 Citations

Bit-flipping BIST

Hans-Joachim Wunderlich;Gundolf Kiefer.
international conference on computer aided design (1996)

305 Citations

Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST

Hua-Guo Liang;Sybille Hellebrand;Hans-Joachim Wunderlich.
Journal of Electronic Testing (2002)

302 Citations

Mixed-Mode BIST Using Embedded Processors

Sybille Hellebrand;Hans-Joachim Wunderlich;Andre Hertwig.
Journal of Electronic Testing (1998)

216 Citations

A modified clock scheme for a low power BIST test pattern generator

P. Girard;L. Guiller;C. Landrault;S. Pravossoudovitch.
vlsi test symposium (2001)

207 Citations

Pattern generation for a deterministic BIST scheme

Sybille Hellebrand;Birgit Reeb;Steffen Tarnick;Hans-Joachim Wunderlich.
international conference on computer aided design (1995)

204 Citations

PROTEST: A Tool for Probabilistic Testability Analysis

Hans-Joachim Wunderlich.
design automation conference (1985)

146 Citations

Adaptive Debug and Diagnosis without Fault Dictionaries

S. Hoist;H.-J. Wunderlich.
european test symposium (2007)

139 Citations

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