D-Index & Metrics Best Publications

D-Index & Metrics

Discipline name D-index D-index (Discipline H-index) only includes papers and citation values for an examined discipline in contrast to General H-index which accounts for publications across all disciplines. Citations Publications World Ranking National Ranking
Computer Science D-index 48 Citations 9,963 428 World Ranking 3123 National Ranking 1639

Research.com Recognitions

Awards & Achievements

1999 - IEEE Fellow For contributions to the area of test generation for digital logic circuits.

Overview

What is she best known for?

The fields of study she is best known for:

  • Algorithm
  • Statistics
  • Artificial intelligence

Algorithm, Automatic test pattern generation, Fault coverage, Sequential logic and Fault are her primary areas of study. The concepts of her Algorithm study are interwoven with issues in Test set and Fault detection and isolation. Her Automatic test pattern generation research is multidisciplinary, incorporating perspectives in Electronic engineering, Benchmark and Stuck-at fault.

In Fault coverage, Irith Pomeranz works on issues like Reliability engineering, which are connected to Measure, Automatic test equipment and Structural engineering. The various areas that she examines in her Sequential logic study include State, Synchronization, Test strategy, Simulation and Sequence. Irith Pomeranz interconnects Computation and Resolution in the investigation of issues within Fault.

Her most cited work include:

  • Techniques for minimizing power dissipation in scan and combinational circuits during test application (311 citations)
  • Transient-fault recovery for chip multiprocessors (280 citations)
  • Transient-fault recovery using simultaneous multithreading (268 citations)

What are the main themes of her work throughout her whole career to date?

Irith Pomeranz mainly investigates Algorithm, Fault coverage, Automatic test pattern generation, Fault and Test set. Her Algorithm study combines topics from a wide range of disciplines, such as Test, Electronic circuit, Benchmark and Fault detection and isolation. Her research in Electronic circuit intersects with topics in Electronic engineering and Logic gate.

Her work in Fault coverage tackles topics such as Stuck-at fault which are related to areas like Fault indicator and Fault model. In her study, Boundary scan is strongly linked to Scan chain, which falls under the umbrella field of Automatic test pattern generation. The study incorporates disciplines such as Very-large-scale integration and Computation in addition to Test set.

She most often published in these fields:

  • Algorithm (67.89%)
  • Fault coverage (46.39%)
  • Automatic test pattern generation (43.59%)

What were the highlights of her more recent work (between 2015-2021)?

  • Algorithm (67.89%)
  • Benchmark (19.59%)
  • Test set (31.52%)

In recent papers she was focusing on the following fields of study:

Her scientific interests lie mostly in Algorithm, Benchmark, Test set, Electronic circuit and Fault coverage. Her Algorithm study combines topics from a wide range of disciplines, such as Fault, Sequence, Very-large-scale integration and Volume. Her Test set research is multidisciplinary, incorporating elements of Test, Compaction, Fault detection and isolation, Scan chain and Computation.

In her study, which falls under the umbrella issue of Electronic circuit, Mode is strongly linked to Electronic engineering. Irith Pomeranz has included themes like Computational complexity theory, Automatic test pattern generation and Test sequence in her Fault coverage study. Her work in Automatic test pattern generation addresses issues such as Stuck-at fault, which are connected to fields such as Fault indicator.

Between 2015 and 2021, her most popular works were:

  • A Test Selection Procedure for Improving the Accuracy of Defect Diagnosis (9 citations)
  • New Techniques to Reduce the Execution Time of Functional Test Programs (8 citations)
  • Reduction of diagnostic fail data volume and tester time using a dynamic N-cover algorithm (8 citations)

In her most recent research, the most cited papers focused on:

  • Algorithm
  • Statistics
  • Artificial intelligence

Her main research concerns Algorithm, Benchmark, Fault, Test set and Fault coverage. Her Algorithm research integrates issues from Test compression and Very-large-scale integration. Irith Pomeranz has researched Fault in several fields, including Sequential logic and Flexibility.

The various areas that she examines in her Test set study include Test and Data collection. Her Fault coverage research is multidisciplinary, relying on both Computational complexity theory, Cube and Automatic test pattern generation. Her research integrates issues of Reliability engineering and Stuck-at fault in her study of Automatic test pattern generation.

This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.

Best Publications

Transient-fault recovery for chip multiprocessors

Mohamed Gomaa;Chad Scarbrough;T. N. Vijaykumar;Irith Pomeranz.
international symposium on computer architecture (2003)

471 Citations

COMPACTEST: a method to generate compact test sets for combinational circuits

I. Pomeranz;L.N. Reddy;S.M. Reddy.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1993)

445 Citations

Transient-fault recovery using simultaneous multithreading

T. N. Vijaykumar;Irith Pomeranz;Karl Cheng.
international symposium on computer architecture (2002)

432 Citations

Techniques for minimizing power dissipation in scan and combinational circuits during test application

V. Dabholkar;S. Chakravarty;I. Pomeranz;S. Reddy.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1998)

373 Citations

Cost-effective generation of minimal test sets for stuck-at faults in combinational logic circuits

S. Kajihara;I. Pomeranz;K. Kinoshita;S.M. Reddy.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1995)

320 Citations

Preferred Fill: A Scalable Method to Reduce Capture Power for Scan Based Designs

S. Remersaro;X. Lin;Z. Zhang;S.M. Reddy.
international test conference (2006)

289 Citations

3-weight pseudo-random test generation based on a deterministic test set for combinational and sequential circuits

I. Pomeranz;S.M. Reddy.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1993)

193 Citations

On static compaction of test sequences for synchronous sequential circuits

Irith Pomeranz;Sudhakar M. Reddy.
design automation conference (1996)

154 Citations

On n-detection test sets and variable n-detection test sets for transition faults

I. Pomeranz;S.M. Reddy.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2000)

145 Citations

On test data volume reduction for multiple scan chain designs

Sudhakar M. Reddy;Kohei Miyase;Seiji Kajihara;Irith Pomeranz.
ACM Transactions on Design Automation of Electronic Systems (2003)

143 Citations

Best Scientists Citing Irith Pomeranz

Krishnendu Chakrabarty

Krishnendu Chakrabarty

Duke University

Publications: 122

Janusz Rajski

Janusz Rajski

Siemens (Germany)

Publications: 95

Vishwani D. Agrawal

Vishwani D. Agrawal

Auburn University

Publications: 79

Sudhakar M. Reddy

Sudhakar M. Reddy

University of Iowa

Publications: 79

Michael S. Hsiao

Michael S. Hsiao

Virginia Tech

Publications: 74

Xiaoqing Wen

Xiaoqing Wen

Kyushu Institute of Technology

Publications: 72

Bernd Becker

Bernd Becker

University of Freiburg

Publications: 62

Kwang-Ting Cheng

Kwang-Ting Cheng

Hong Kong University of Science and Technology

Publications: 57

Kewal K. Saluja

Kewal K. Saluja

University of Wisconsin–Madison

Publications: 53

Nur A. Touba

Nur A. Touba

The University of Texas at Austin

Publications: 50

Hans-Joachim Wunderlich

Hans-Joachim Wunderlich

University of Stuttgart

Publications: 49

Wu-Tung Cheng

Wu-Tung Cheng

Mentor Graphics

Publications: 45

Jerzy Tyszer

Jerzy Tyszer

Poznań University of Technology

Publications: 42

Janak H. Patel

Janak H. Patel

University of Illinois at Urbana-Champaign

Publications: 38

Srimat T. Chakradhar

Srimat T. Chakradhar

Princeton University

Publications: 34

Profile was last updated on December 6th, 2021.
Research.com Ranking is based on data retrieved from the Microsoft Academic Graph (MAG).
The ranking d-index is inferred from publications deemed to belong to the considered discipline.

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