2026 Ilia Polian: Computer Science Researcher – H-Index, Publications & Awards

Discipline name	D-Index	World Ranking	Current World Ranking	National Ranking	Current National Ranking	Publications	Citations
Computer Science	32	13199	12810	637	622	252	4177

Overview

Ilia Polian is affiliated with the University of Stuttgart in Germany and has a substantial research portfolio focused primarily on computer science and engineering. Their work spans a wide array of specialized topics within these fields, emphasizing areas such as quantum computing, hardware security, and artificial intelligence.

The scientist's main fields of study include:

Computer Science
Engineering

Within these fields, Polian has contributed extensively to several subfields, including:

Artificial Intelligence
Electrical and Electronic Engineering
Hardware and Architecture
Computer Vision and Pattern Recognition
Atomic and Molecular Physics, and Optics

The primary research topics covered by Polian's work are:

Quantum Computing Algorithms and Architecture
Quantum Information and Cryptography
Advanced Memory and Neural Computing
Physical Unclonable Functions (PUFs) and Hardware Security
Quantum and electron transport phenomena
Ferroelectric and Negative Capacitance Devices
Cryptographic Implementations and Security

Among the recent papers authored or coauthored by Polian are:

"Benchmarking the performance of portfolio optimization with QAOA," 2022, Quantum Information Processing
"Low-power emerging memristive designs towards secure hardware systems for applications in internet of things," 2021, Nano Materials Science
"Protecting artificial intelligence IPs: a survey of watermarking and fingerprinting for machine learning," 2021, CAAI Transactions on Intelligence Technology
"Optimal Partitioning of Quantum Circuits Using Gate Cuts and Wire Cuts," 2023, IEEE Transactions on Quantum Engineering
"Optimal Mapping for Near-Term Quantum Architectures based on Rydberg Atoms," 2021, 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD)

Polian frequently collaborates with several researchers, including:

Sebastian Brandhofer
Nan Du
Yanjun Ji
Xianyue Zhao
Ziang Chen

The venues where Polian has most frequently published their research include:

arXiv (Cornell University)
IEEE Transactions on Nanotechnology
IEEE Transactions on Quantum Engineering
Scientific Reports
Physical Review A

Best Publications

A Definition and Classification of Timing Anomalies

Jan Reineke;Björn Wachter;Stephan Thesing;Reinhard Wilhelm

269
Citations
A Family of Logical Fault Models for Reversible Circuits

I. Polian;T. Fiehn;B. Becker;J.P. Hayes

154
Citations
Testing for missing-gate faults in reversible circuits

J.P. Hayes;I. Polian;B. Becker

142
Citations
X-masking during logic BIST and its impact on defect coverage

Yuyi Tang;H.-J. Wunderlich;Piet Engelke;I. Polian

134
Citations
Simulating Resistive-Bridging and Stuck-At Faults

Piet Engelke;I. Polian;M. Renovell;B. Becker

133
Citations
Fault-tolerant, high-level quantum circuits: form, compilation and description

Alexandru Paler;Ilia Polian;Kae Nemoto;Simon J Devitt

116
Citations
Power Droop Testing

I. Polian;A. Czutro;S. Kundu;B. Becker

101
Citations
Parametric Trojans for Fault-Injection Attacks on Cryptographic Hardware

Raghavan Kumar;Philipp Jovanovic;Wayne Burleson;Ilia Polian

87
Citations
A fault attack on the LED block cipher

Philipp Jovanovic;Martin Kreuzer;Ilia Polian

85
Citations
Adaptive voltage over-scaling for resilient applications

Philipp Klaus Krause;Ilia Polian

83
Citations
An Analysis Framework for Transient-Error Tolerance

J.P. Hayes;I. Polian;B. Becker

81
Citations
Selective Hardening: Toward Cost-Effective Error Tolerance

I Polian;J P Hayes

72
Citations
Power Droop Testing

I. Polian;A. Czutro;S. Kundu;B. Becker

72
Citations
Analysis and optimization of fault-tolerant embedded systems with hardened processors

Viacheslav Izosimov;Ilia Polian;Paul Pop;Petru Eles

71
Citations
A Simulator of Small-Delay Faults Caused by Resistive-Open Defects

A. Czutro;N. Houarche;P. Engelke;I. Polian

70
Citations
Functional Constraints vs. Test Compression in Scan-Based Delay Testing

Ilia Polian;Hideo Fujiwara

68
Citations
Small-delay-fault ATPG with waveform accuracy

Matthias Sauer;Alexander Czutro;Ilia Polian;Bernd Becker

65
Citations
Automatic Test Pattern Generation for Interconnect Open Defects

S. Spinner;I. Polian;P. Engelke;B. Becker

63
Citations
Resistive Bridge fault model evolution from conventional to ultra deep submicron

I. Polian;P. Engelke;B. Becker;S. Kundu

61
Citations
Functional Constraints vs. Test Compression in Scan-Based Delay Testing

I. Polian;H. Fujiwara

61
Citations
Low-power emerging memristive designs towards secure hardware systems for applications in internet of things

Nan Du;Heidemarie Schmidt;Ilia Polian

48
Citations
A study of cognitive resilience in a JPEG compressor

D. Nowroth;I. Polian;B. Becker

36
Citations
TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis

Alejandro Czutro;Ilia Polian;Matthew Lewis;Piet Engelke

32
Citations

Frequent Co-Authors

Bernd Becker University of Freiburg

Michel Renovell Montpellier Laboratory of Informatics, Robotics and Microelectronics

John P. Hayes University of Michigan–Ann Arbor

Francesco Regazzoni Polytechnic University of Milan

Sudhakar M. Reddy University of Iowa

Hans-Joachim Wunderlich University of Stuttgart

Sandip Kundu University of Massachusetts Amherst

Raghavan Kumar Intel (United States)

Oliver Paul University of Freiburg

Irith Pomeranz Purdue University West Lafayette

External Links

Personal website of Ilia Polian

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