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Computer Science

D-Index
55
Citations
13388
World Ranking
4280
National Ranking
2016

Overview

T. N. Vijaykumar is affiliated with Purdue University West Lafayette in the United States. Their research spans multiple fields within computer science and engineering, with a significant focus on topics related to computational architectures and advanced neural networks.

The main fields of study for Vijaykumar include:

  • Computer Science
  • Engineering

Within these broader areas, their subfields of study cover:

  • Computer Vision and Pattern Recognition
  • Electrical and Electronic Engineering
  • Computer Networks and Communications
  • Artificial Intelligence
  • Hardware and Architecture

Key topics addressed in their work are:

  • Advanced Neural Network Applications
  • Advanced Memory and Neural Computing
  • Cloud Computing and Resource Management
  • Interconnection Networks and Systems
  • Software-Defined Networks and 5G
  • CCD and CMOS Imaging Sensors
  • Adversarial Robustness in Machine Learning

Their recent research publications illustrate a variety of focuses within these topics. Selected papers include:

  • "Dart: Divide and Specialize for Fast Response to Congestion in RDMA-Based Datacenter Networks", 2020, published in IEEE/ACM Transactions on Networking
  • "Attention-based Joint Detection of Object and Semantic Part", 2020, available on arXiv (Cornell University)
  • "Occam: Optimal Data Reuse for Convolutional Neural Networks", 2022, published in ACM Transactions on Architecture and Code Optimization
  • "Booster: An Accelerator for Gradient Boosting Decision Trees Training and Inference", 2022, presented at the 2022 IEEE International Parallel and Distributed Processing Symposium (IPDPS)
  • "Network Interface Architecture for Remote Indirect Memory Access (RIMA) in Datacenters", 2020, published in ACM Transactions on Architecture and Code Optimization

Frequent co-authors collaborating with Vijaykumar include:

  • Mithuna Thottethodi
  • Ashish Gondimalla
  • Mingxuan He
  • Jiachen Xue
  • Jianqiao Liu

Their publications appear regularly in venues such as:

  • arXiv (Cornell University)
  • ACM Transactions on Architecture and Code Optimization
  • IEEE/ACM Transactions on Networking
  • 2022 IEEE International Parallel and Distributed Processing Symposium (IPDPS)

This profile highlights a multidisciplinary approach bridging theories and applications within computer networks, neural computing, and system architectures.

Best Publications

  • Multiscalar processors

    Gurindar S. Sohi;Scott E. Breach;T. N. Vijaykumar

  • Gated-V/sub dd/: a circuit technique to reduce leakage in deep-submicron cache memories

    Michael Powell;Se-Hyun Yang;Babak Falsafi;Kaushik Roy

  • Deadline-aware datacenter tcp (D2TCP)

    Balajee Vamanan;Jahangir Hasan;T.N. Vijaykumar

  • Transient-fault recovery for chip multiprocessors

    Mohamed Gomaa;Chad Scarbrough;T. N. Vijaykumar;Irith Pomeranz

  • Transient-fault recovery using simultaneous multithreading

    T. N. Vijaykumar;Irith Pomeranz;Karl Cheng

  • Heat-and-run: leveraging SMT and CMP to manage power density through the operating system

    Mohamed Gomaa;Michael D. Powell;T. N. Vijaykumar

  • Optimizing Replication, Communication, and Capacity Allocation in CMPs

    Zeshan Chishti;Michael D. Powell;T. N. Vijaykumar

  • Speculative versioning cache

    S. Gopal;T.N. Vijaykumar;J.E. Smith;G.S. Sohi

  • Dynamic speculation and synchronization of data dependences

    Andreas Moshovos;Scott E. Breach;T. N. Vijaykumar;Gurindar S. Sohi

  • Reducing set-associative cache energy via way-prediction and selective direct-mapping

    Michael D. Powell;Amit Agarwal;T. N. Vijaykumar;Babak Falsafi

  • Tarazu: optimizing MapReduce on heterogeneous clusters

    Faraz Ahmad;Srimat T. Chakradhar;Anand Raghunathan;T. N. Vijaykumar

  • An integrated circuit/architecture approach to reducing leakage in deep-submicron high-performance I-caches

    S. Yang;M.D. Powell;B. Falsafi;K. Roy

  • Distance associativity for high-performance energy-efficient non-uniform cache architectures

    Zeshan Chishti;Michael D. Powell;T. N. Vijaykumar

  • Joint optimization of idle and cooling power in data centers while maintaining response time

    Faraz Ahmad;T. N. Vijaykumar

  • Deadline-aware datacenter tcp (D2TCP)

    Unknown

  • EffiCuts: optimizing packet classification for memory and throughput

    Balajee Vamanan;Gwendolyn Voskuilen;T. N. Vijaykumar

  • SparTen: A Sparse Tensor Accelerator for Convolutional Neural Networks

    Ashish Gondimalla;Noah Chesnut;Mithuna Thottethodi;T. N. Vijaykumar

  • Is SC + ILP = RC?

    Chris Gniady;Babak Falsafi;T. N. Vijaykumar

  • Exploiting choice in resizable cache design to optimize deep-submicron processor energy-delay

    Se-Hyun Yang;M.D. Powell;B. Falsafi;T.N. Vijaykumar

  • Reducing register ports for higher speed and lower energy

    Il Park;Michael D. Powell;T. N. Vijaykumar

  • Speculative Versioning Cache

    T.N. Vijaykumar;S. Gopal;J.E. Smith;G. Sohi

  • Gated-V/sub dd/: a circuit technique to reduce leakage in deep-submicron cache memories

    Unknown

Frequent Co-Authors

Babak Falsafi
Babak Falsafi École Polytechnique Fédérale de Lausanne
Kaushik Roy
Kaushik Roy Purdue University West Lafayette
Gurindar S. Sohi
Gurindar S. Sohi University of Wisconsin–Madison
Sanjay Rao
Sanjay Rao Purdue University West Lafayette
Rudolf Eigenmann
Rudolf Eigenmann University of Delaware
Carla E. Brodley
Carla E. Brodley Northeastern University
Steven T. Wereley
Steven T. Wereley Purdue University West Lafayette
Hai Li
Hai Li Duke University
Irith Pomeranz
Irith Pomeranz Purdue University West Lafayette
Swarup Bhunia
Swarup Bhunia University of Florida

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