2018 - Member of Academia Europaea
2017 - ACM Fellow For contributions to computer architecture research, especially in memory systems
2013 - ACM Senior Member
The scientist’s investigation covers issues in Dram, Embedded system, Computer hardware, Parallel computing and Scheduling. The Dram study combines topics in areas such as Universal memory, Memory rank, Random access memory and Latency. His Embedded system research includes themes of Scalability, Interleaved memory and Profiling.
His Flash memory study, which is part of a larger body of work in Computer hardware, is frequently linked to Nand flash memory, bridging the gap between disciplines. His Parallel computing research is multidisciplinary, incorporating perspectives in Sense amplifier and Bitwise operation. His Scheduling research incorporates themes from Microcontroller, Thread, Instruction prefetch and CUDA.
His primary areas of study are Dram, Embedded system, Parallel computing, Cache and Distributed computing. His Dram study introduces a deeper knowledge of Computer hardware. His work on Flash memory as part of general Computer hardware study is frequently linked to Flash, therefore connecting diverse disciplines of science.
Onur Mutlu has included themes like Exploit, Software, Memory controller and Chip in his Embedded system study. His study in Parallel computing is interdisciplinary in nature, drawing from both Interleaved memory, Scheduling and Thread. His Distributed computing research incorporates themes from Scalability, Shared memory, Computer network, Multi-core processor and Programming paradigm.
His scientific interests lie mostly in Embedded system, Dram, Energy consumption, Efficient energy use and Scalability. His Embedded system research includes elements of Spec#, Latency, Chip, Memory bank and Key. Dram is a subfield of Computer hardware that he explores.
His work in Computer hardware tackles topics such as Quantization which are related to areas like Field-programmable gate array. His study focuses on the intersection of Energy consumption and fields such as Bottleneck with connections in the field of Memory bandwidth, Computation and Parallel computing. His Scalability research is multidisciplinary, relying on both Construct, Distributed computing, Algorithm and Source code.
His primary areas of study are Dram, Embedded system, Energy consumption, Scalability and Efficient energy use. Onur Mutlu integrates Dram and Bit error rate in his research. His biological study spans a wide range of topics, including Overhead, Data access, Memory bank, Data retention and Scheduling.
His work deals with themes such as Bottleneck and Latency, which intersect with Energy consumption. He works mostly in the field of Scalability, limiting it down to topics relating to Algorithm and, in certain cases, Identification. Cache is the subject of his research, which falls under Parallel computing.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
Architecting phase change memory as a scalable dram alternative
Benjamin C. Lee;Engin Ipek;Onur Mutlu;Doug Burger.
international symposium on computer architecture (2009)
Personalized copy number and segmental duplication maps using next-generation sequencing
Can Alkan;Jeffrey M Kidd;Tomas Marques-Bonet;Tomas Marques-Bonet;Gozde Aksay.
Nature Genetics (2009)
Flipping bits in memory without accessing them: an experimental study of DRAM disturbance errors
Yoongu Kim;Ross Daly;Jeremie Kim;Chris Fallin.
international symposium on computer architecture (2014)
Parallelism-Aware Batch Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems
Onur Mutlu;Thomas Moscibroda.
international symposium on computer architecture (2008)
Stall-Time Fair Memory Access Scheduling for Chip Multiprocessors
Onur Mutlu;Thomas Moscibroda.
international symposium on microarchitecture (2007)
Runahead execution: an alternative to very large instruction windows for out-of-order processors
O. Mutlu;J. Stark;C. Wilkerson;Y.N. Patt.
high-performance computer architecture (2003)
A scalable processing-in-memory accelerator for parallel graph processing
Junwhan Ahn;Sungpack Hong;Sungjoo Yoo;Onur Mutlu.
international symposium on computer architecture (2015)
RAIDR: Retention-Aware Intelligent DRAM Refresh
Jamie Liu;Ben Jaiyen;Richard Veras;Onur Mutlu.
international symposium on computer architecture (2012)
Thread Cluster Memory Scheduling: Exploiting Differences in Memory Access Behavior
Yoongu Kim;Michael Papamichael;Onur Mutlu;Mor Harchol-Balter.
international symposium on microarchitecture (2010)
ATLAS: A scalable and high-performance scheduling algorithm for multiple memory controllers
Yoongu Kim;Dongsu Han;Onur Mutlu;Mor Harchol-Balter.
high-performance computer architecture (2010)
Profile was last updated on December 6th, 2021.
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