2001 - IEEE Fellow For contributions to the dependability and performance evaluation of Multiprocessor Interconnection Networks.
Chita R. Das mostly deals with Embedded system, Computer network, Network on a chip, Distributed computing and Parallel computing. Her Embedded system study integrates concerns from other disciplines, such as Scalability, Cache, Energy consumption, Exploit and System recovery. Her Computer network study frequently draws connections between adjacent fields such as Wireless mesh network.
Her Network on a chip research includes themes of Network packet, Throughput, Router, Fault tolerance and System on a chip. Chita R. Das has researched Distributed computing in several fields, including Mobile ad hoc network, Workload and Processor scheduling. The Parallel computing study combines topics in areas such as Static memory allocation, Scheduling, Thread and General-purpose computing on graphics processing units.
Her primary scientific interests are in Computer network, Distributed computing, Parallel computing, Scheduling and Embedded system. Her work on Wireless ad hoc network expands to the thematically related Computer network. Chita R. Das usually deals with Distributed computing and limits it to topics linked to Server and Shared resource.
The concepts of her Parallel computing study are interwoven with issues in Scheme and Queueing theory. The study incorporates disciplines such as Scalability, Latency, Energy consumption, Efficient energy use and Multi-core processor in addition to Embedded system. Her Router study combines topics in areas such as Throughput, Interconnection and Network on a chip.
Chita R. Das focuses on Parallel computing, Embedded system, Scheduling, Distributed computing and Cache. Her Parallel computing research is multidisciplinary, relying on both Bottleneck, Interleaved memory and General-purpose computing on graphics processing units. She interconnects Android, Scalability, Multi-core processor and Central processing unit in the investigation of issues within Embedded system.
Her Scheduling study combines topics from a wide range of disciplines, such as Quality of service, Queue and Server. Chita R. Das has included themes like Workload, Cloud computing, Efficient energy use and Provisioning in her Distributed computing study. Chita R. Das studied Cache and Latency that intersect with Garbage collection.
Parallel computing, Scheduling, Embedded system, Cache and Latency are her primary areas of study. Her research in Parallel computing intersects with topics in Dram, Queueing theory, Bottleneck, Kernel and General-purpose computing on graphics processing units. The Scheduling study combines topics in areas such as Queue, Cloud computing, Server and Datapath.
Her Embedded system research is multidisciplinary, relying on both Android, Key and Virtual desktop. Her Cache study combines topics from a wide range of disciplines, such as Energy consumption and Video tracking. Computer network is often connected to Distributed computing in her work.
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Towards characterizing cloud backend workloads: insights from Google compute clusters
Asit K. Mishra;Joseph L. Hellerstein;Walfredo Cirne;Chita R. Das.
measurement and modeling of computer systems (2010)
ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers
Chrysostomos A. Nicopoulos;Dongkook Park;Jongman Kim;N. Vijaykrishnan.
international symposium on microarchitecture (2006)
A novel dimensionally-decomposed router for on-chip communication in 3D architectures
Jongman Kim;Chrysostomos Nicopoulos;Dongkook Park;Reetuparna Das.
international symposium on computer architecture (2007)
A low latency router supporting adaptivity for on-chip interconnects
Jongman Kim;Dongkook Park;T. Theocharides;N. Vijaykrishnan.
design automation conference (2005)
OWL: cooperative thread array aware scheduling techniques for improving GPGPU performance
Adwait Jog;Onur Kayiran;Nachiappan Chidambaram Nachiappan;Asit K. Mishra.
architectural support for programming languages and operating systems (2013)
Cache revive: architecting volatile STT-RAM caches for enhanced performance in CMPs
Adwait Jog;Asit K. Mishra;Cong Xu;Yuan Xie.
design automation conference (2012)
Exploring Fault-Tolerant Network-on-Chip Architectures
D. Park;C. Nicopoulos;J. Kim;N. Vijaykrishnan.
dependable systems and networks (2006)
MIRA: A Multi-layered On-Chip Interconnect Router Architecture
Dongkook Park;Soumya Eachempati;Reetuparna Das;Asit K. Mishra.
international symposium on computer architecture (2008)
Neither more nor less: optimizing thread-level parallelism for GPGPUs
Onur Kayıran;Adwait Jog;Mahmut Taylan Kandemir;Chita Ranjan Das.
international conference on parallel architectures and compilation techniques (2013)
A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks
Jongman Kim;Chrysostomos Nicopoulos;Dongkook Park;Vijaykrishnan Narayanan.
international symposium on computer architecture (2006)
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