2016 - IEEE Fellow For contributions to compiler support for performance and energy optimization of computer architectures
His scientific interests lie mostly in Embedded system, Parallel computing, Energy consumption, Cache and Compiler. His research in Embedded system is mostly focused on Memory architecture. In his research, Energy conservation is intimately related to Dram, which falls under the overarching field of Memory architecture.
Mahmut Kandemir has researched Parallel computing in several fields, including Scheduling, Thread and Loop nest optimization. His Energy consumption research incorporates themes from Optimizing compiler, Process, Distributed computing and Leakage. His Compiler research also works with subjects such as
Mahmut Kandemir mainly investigates Parallel computing, Embedded system, Compiler, Cache and Energy consumption. His research in Parallel computing tackles topics such as Loop nest optimization which are related to areas like Loop interchange. In his study, Distributed memory is strongly linked to Memory management, which falls under the umbrella field of Embedded system.
His work deals with themes such as Scheme, Data access, Computer architecture and Set, which intersect with Compiler. Many of his studies on Cache apply to Distributed computing as well. His Energy consumption study integrates concerns from other disciplines, such as Real-time computing, Efficient energy use and Integer programming.
Mahmut Kandemir mainly focuses on Parallel computing, Embedded system, Cache, Scheduling and Software. He has included themes like Latency, Compiler, System on a chip, Interleaved memory and General-purpose computing on graphics processing units in his Parallel computing study. His Embedded system research is multidisciplinary, incorporating perspectives in Scalability and Multi-core processor.
His study in Cache is interdisciplinary in nature, drawing from both Multiprocessing, Overhead, Data access and Static random-access memory. His Scheduling research includes themes of Queue, Provisioning, Distributed computing and Microservices. His research investigates the connection with Software and areas like Idle which intersect with concerns in Memory bandwidth.
Mahmut Kandemir mostly deals with Parallel computing, Embedded system, Cache, Scheduling and Dram. His studies deal with areas such as Kernel, Interleaved memory, Latency and Uniform memory access as well as Parallel computing. In his research, Mahmut Kandemir undertakes multidisciplinary study on Embedded system and Throughput.
His work on Cache algorithms as part of general Cache study is frequently linked to Video decoder and Performance improvement, therefore connecting diverse disciplines of science. His work carried out in the field of Scheduling brings together such families of science as Quality of service, Dynamic demand, Queue and Distributed computing. His Bandwidth research focuses on Schedule and how it relates to Energy consumption and Reduction.
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Leakage current: Moore's law meets static power
N.S. Kim;T. Austin;D. Baauw;T. Mudge.
IEEE Computer (2003)
The design and use of simplepower: a cycle-accurate energy estimation tool
W. Ye;N. Vijaykrishnan;M. Kandemir;M. J. Irwin.
design automation conference (2000)
DRPM: dynamic speed control for power management in server class disks
Sudhanva Gurumurthi;Anand Sivasubramaniam;Mahmut Kandemir;Hubertus Franke.
international symposium on computer architecture (2003)
Design and Management of 3D Chip Multiprocessors Using Network-in-Memory
Feihui Li;Chrysostomos Nicopoulos;Thomas Richardson;Yuan Xie.
international symposium on computer architecture (2006)
Evaluating STT-RAM as an energy-efficient main memory alternative
Emre Kultursay;Mahmut Kandemir;Anand Sivasubramaniam;Onur Mutlu.
international symposium on performance analysis of systems and software (2013)
Dynamic management of scratch-pad memory space
M. Kandemir;J. Ramanujam;J. Irwin;N. Vijaykrishnan.
design automation conference (2001)
Energy-driven integrated hardware-software optimizations using SimplePower
N. Vijaykrishnan;M. Kandemir;M. J. Irwin;H. S. Kim.
international symposium on computer architecture (2000)
Fault tolerant algorithms for network-on-chip interconnect
M. Pirretti;G.M. Link;R.R. Brooks;N. Vijaykrishnan.
ieee computer society annual symposium on vlsi (2004)
Neither more nor less: optimizing thread-level parallelism for GPGPUs
Onur Kayıran;Adwait Jog;Mahmut Taylan Kandemir;Chita Ranjan Das.
international conference on parallel architectures and compilation techniques (2013)
Using complete machine simulation for software power estimation: the SoftWatt approach
S. Gurumurthi;A. Sivasubramaniam;M.J. Irwin;N. Vijaykrishnan.
high-performance computer architecture (2002)
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