2016 - IEEE Fellow For contributions to design methods and tools for multiprocessor systems on chip
David Atienza mainly investigates Embedded system, System on a chip, MPSoC, Multi-core processor and Energy consumption. His biological study spans a wide range of topics, including Multiprocessing and Scalability. His study in System on a chip is interdisciplinary in nature, drawing from both Field-programmable gate array, Control theory and Computer cooling.
David Atienza interconnects UltraSPARC, Software, Reliability and Control theory in the investigation of issues within MPSoC. His research investigates the link between Multi-core processor and topics such as Chip that cross with problems in Power management, Energy management and Integrated circuit design. His Energy consumption research includes themes of Temperature control, Memory hierarchy, Electronic engineering, Crossbar switch and Power gating.
His primary scientific interests are in Embedded system, MPSoC, Real-time computing, System on a chip and Electronic engineering. His work in the fields of Embedded system, such as Field-programmable gate array, intersects with other areas such as Context. David Atienza has researched Real-time computing in several fields, including Wireless, Wireless sensor network and Wearable computer.
His study in Network on a chip extends to System on a chip with its themes. His Electronic engineering research is multidisciplinary, incorporating elements of Chip and Computer cooling. His research investigates the connection between Energy consumption and topics such as Efficient energy use that intersect with issues in Quality of service and Server.
Artificial intelligence, Wearable computer, Efficient energy use, Machine learning and Wearable technology are his primary areas of study. His research in Wearable computer intersects with topics in Epileptic seizure, Ambulatory, Real-time computing and Human–computer interaction. His Efficient energy use research integrates issues from Energy consumption, Data center, Cloud computing and Distributed computing.
His work investigates the relationship between Cloud computing and topics such as Enhanced Data Rates for GSM Evolution that intersect with problems in Embedded system. While the research belongs to areas of Machine learning, David Atienza spends his time largely on the problem of Server, intersecting his research to questions surrounding Multi-core processor and Virtual machine. His study looks at the relationship between Wearable technology and fields such as Physical medicine and rehabilitation, as well as how they intersect with chemical problems.
Wearable computer, Wearable technology, Efficient energy use, Machine learning and Artificial intelligence are his primary areas of study. His Wearable technology research includes elements of Resource, Enhanced Data Rates for GSM Evolution, Real-time computing and Robustness. David Atienza has included themes like Sleep apnea, Cloud computing and Obstructive sleep apnea in his Efficient energy use study.
The various areas that David Atienza examines in his Machine learning study include Energy consumption, Server and Chip. His Energy consumption research is multidisciplinary, incorporating perspectives in Microcontroller, Task analysis and Reliability. His Server research is multidisciplinary, relying on both Virtual machine, Scalability, Distributed computing, Power management and Multi-core processor.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
Compressed Sensing for Real-Time Energy-Efficient ECG Compression on Wireless Body Sensor Nodes
H. Mamaghanian;N. Khaled;D. Atienza;P. Vandergheynst.
IEEE Transactions on Biomedical Engineering (2011)
3D-ICE: fast compact transient thermal modeling for 3D ICs with inter-tier liquid cooling
Arvind Sridhar;Alessandro Vincenzi;Martino Ruggiero;Thomas Brunschwiler.
international conference on computer aided design (2010)
Prediction and management in energy harvested wireless sensor nodes
Joaquin Recas Piorno;Carlo Bergonzini;David Atienza;Tajana Simunic Rosing.
international conference on wireless communication, vehicular technology, information theory and aerospace & electronic systems technology (2009)
Designing application-specific networks on chips with floorplan information
S. Murali;P. Meloni;F. Angiolini;D. Atienza.
international conference on computer aided design (2006)
Dynamic thermal management in 3D multicore architectures
Ayse K. Coskun;Jose L. Ayala;David Atienza;Tajana Simunic Rosing.
design, automation, and test in europe (2009)
An integrated hardware/software approach for run-time scratchpad management
Poletti Francesco;Paul Marchal;David Atienza;Luca Benini.
design automation conference (2004)
A Complete Network-On-Chip Emulation Framework
N. Genko;D. Atienza;G. De Micheli;J. M. Mendias.
design, automation, and test in europe (2005)
Temperature-aware processor frequency assignment for MPSoCs using convex optimization
S Murali;A Mutapcic;D Atienza;R Gupta.
international conference on hardware/software codesign and system synthesis (2007)
Invited paper: Network-on-Chip design and synthesis outlook
David Atienza;Federico Angiolini;Srinivasan Murali;Antonio Pullini.
Integration (2008)
Temperature control of high-performance multi-core platforms using convex optimization
S. Murali;A. Mutapcic;D. Atienza;R. Gupta.
design, automation, and test in europe (2008)
Profile was last updated on December 6th, 2021.
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