World's Best Scientists 2026 revealed!

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
52
Citations
13388
World Ranking
2489
National Ranking
50

Research.com Recognitions

  • 2010 - IEEE Fellow For contributions to reliability and design techniques for integrated circuits and systems

Overview

Yusuf Leblebici is affiliated with the École Polytechnique Fédérale de Lausanne in Switzerland. Their research primarily focuses on engineering, with a strong emphasis on electrical and electronic engineering as well as biomedical engineering. Additional areas of study include atomic and molecular physics and optics, materials chemistry, and cellular and molecular neuroscience.

Their work covers several main research topics, including:

  • Nanowire Synthesis and Applications
  • Advanced Memory and Neural Computing
  • Analog and Mixed-Signal Circuit Design
  • Neuroscience and Neural Engineering
  • Advancements in PLL and VCO Technologies
  • Advancements in Semiconductor Devices and Circuit Design
  • Mechanical and Optical Resonators

The scientist has authored papers published in several venues, notably:

  • ACS Applied Nano Materials
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • IEEE Transactions on Circuits and Systems I Regular Papers
  • MRS Advances
  • IEEE Solid-State Circuits Letters

Representative recent publications include:

  • "A 32-Gb/s PAM-4 SST Transmitter With Four-Tap FFE Using High-Impedance Driver in 28-nm FDSOI," 2021, IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • "An 8-Bit 800 MS/s Loop-Unrolled SAR ADC With Common-Mode Adaptive Background Offset Calibration in 28 nm FDSOI," 2021, IEEE Transactions on Circuits and Systems I Regular Papers
  • "A new characterization approach to study the mechanical behavior of silicon nanowires," 2021, MRS Advances
  • "Effect of Native Oxide on Stress in Silicon Nanowires: Implications for Nanoelectromechanical Systems," 2022, ACS Applied Nano Materials
  • "An AC-Coupled Wideband Neural Recording Front-End With Sub-1 mm2×fJ/conv-step Efficiency and 0.97 NEF," 2020, IEEE Solid-State Circuits Letters

Frequent co-authors in their publications include:

  • B. Erdem Alaca
  • Mohammad Nasr Esfahani
  • Firat Çelik
  • Ayça Akkaya
  • Sina Zare Pakzad

Yusuf Leblebici was recognized as an IEEE Fellow in 2010 for contributions to reliability and design techniques for integrated circuits and systems.

Best Publications

  • Neuromorphic computing using non-volatile memory

    Geoffrey W. Burr;Robert M. Shelby;Abu Sebastian;Sangbum Kim

  • Neuromorphic computing with multi-memristive synapses

    Irem Boybat;Irem Boybat;Manuel Le Gallo;S. R. Nandakumar;S. R. Nandakumar;Timoleon Moraitis

  • CMOS Digital Integrated Circuits Analysis & Design

    Sung-Mo (Steve) Kang;Yusuf Leblebici

  • A 3.1 mW 8b 1.2 GS/s Single-Channel Asynchronous SAR ADC With Alternate Comparators for Enhanced Speed in 32 nm Digital SOI CMOS

    L. Kull;T. Toifl;M. Schmatz;P. A. Francese

  • Polarity control in double-gate, gate-all-around vertically stacked silicon nanowire FETs

    M. De Marchi;D. Sacchetto;S. Frache;J. Zhang

  • MoS2 transistors operating at gigahertz frequencies.

    Daria Krasnozhon;Dominik Lembke;Clemens Nyffeler;Yusuf Leblebici

  • Dynamic thermal management in 3D multicore architectures

    Ayse K. Coskun;Jose L. Ayala;David Atienza;Tajana Simunic Rosing

  • Energy Efficient Low-Noise Neural Recording Amplifier With Enhanced Noise Efficiency Factor

    V Majidzadeh;A Schmid;Y Leblebici

  • 22.1 A 90GS/s 8b 667mW 64× interleaved SAR ADC in 32nm digital SOI CMOS

    Lukas Kull;Thomas Toifl;Martin Schmatz;Pier Andrea Francese

  • Large-scale neural networks implemented with non-volatile memory as the synaptic weight element: Comparative performance analysis (accuracy, speed, and power)

    G. W. Burr;P. Narayanan;R. M. Shelby;S. Sidler

  • A capacitive threshold-logic gate

    H. Ozdemir;A. Kepkep;B. Pamir;Y. Leblebici

  • Subthreshold Source-Coupled Logic Circuits for Ultra-Low-Power Applications

    A. Tajalli;E.J. Brauer;Y. Leblebici;E. Vittoz

  • Implementing Ultra-high-Value Floating Tunable CMOS Resistors

    Armin Tajalli;Yusuf Leblebici;Elizabeth J. Brauer

  • Memristive-Biosensors: A New Detection Method by Using Nanofabricated Memristors

    Sandro Carrara;Davide Sacchetto;Marie-Agnès Doucey;Camilla Baj-Rossi

  • Configurable Logic Gates Using Polarity-Controlled Silicon Nanowire Gate-All-Around FETs

    Michele De Marchi;Jian Zhang;Stefano Frache;Davide Sacchetto

  • Top–Down Fabrication of Gate-All-Around Vertically Stacked Silicon Nanowire FETs With Controllable Polarity

    Michele De Marchi;Davide Sacchetto;Jian Zhang;Stefano Frache

  • Hot-carrier reliability of MOS VLSI circuits

    Yusuf Leblebici;Sung-Mo Kang

  • Omnidirectional sensor array system

    Luigi Bagnato;Laurent Jacques;Pierre Vandergheynst;Hossein Afshari

  • Analysis and Optimization of MPSoC Reliability

    Ayse Kivilcim Coskun;Tajana Simunic Rosing;Kresimir Mihic;Giovanni De Micheli

  • A 3.1mW 8b 1.2GS/s single-channel asynchronous SAR ADC with alternate comparators for enhanced speed in 32nm digital SOI CMOS

    Unknown

  • CMOS Digital Integrated Circuits: Analysis & Design, 4th Edition

    Sung-Mo Kang;Yusuf Leblebici;Chulwoo Kim

Frequent Co-Authors

Sung-Mo Kang
Sung-Mo Kang University of California, Santa Cruz
Paolo Ienne
Paolo Ienne École Polytechnique Fédérale de Lausanne
M. S. Ünlü
M. S. Ünlü Boston University
Thomas Morf
Thomas Morf IBM (United States)
Sandro Carrara
Sandro Carrara École Polytechnique Fédérale de Lausanne
Pierre-Emmanuel Gaillardon
Pierre-Emmanuel Gaillardon University of Utah
Christian Menolfi
Christian Menolfi IBM (Switzerland)
Adrian M. Ionescu
Adrian M. Ionescu École Polytechnique Fédérale de Lausanne

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