2016 - IEEE Fellow For contributions to energy-efficient VLSI circuits
His scientific interests lie mostly in Electronic engineering, CMOS, Integrated circuit, Very-large-scale integration and Logic gate. In general Electronic engineering, his work in Ring oscillator is often linked to Low-power electronics linking many areas of study. His studies deal with areas such as Energy consumption, Algorithm design, Topology, Logical effort and Network analysis as well as CMOS.
His work deals with themes such as Integrated circuit design and Emerging technologies, which intersect with Integrated circuit. His biological study spans a wide range of topics, including Leakage, Network topology, Parasitic extraction and Sensitivity. While the research belongs to areas of Logic gate, he spends his time largely on the problem of PMOS logic, intersecting his research to questions surrounding XOR gate, Bipolar junction transistor and Small-signal model.
Massimo Alioto mainly focuses on Electronic engineering, CMOS, Logic gate, Voltage and Very-large-scale integration. His work is dedicated to discovering how Electronic engineering, Electronic circuit are connected with Integrated circuit design and other disciplines. The various areas that Massimo Alioto examines in his CMOS study include Energy consumption, Leakage, Integrated circuit, Threshold voltage and Efficient energy use.
His Logic gate study which covers Pass transistor logic that intersects with Logic family and NMOS logic. His research in Voltage focuses on subjects like Robustness, which are connected to Power analysis. He interconnects Digital electronics, Algorithm, Cryptography, Parasitic extraction and Circuit design in the investigation of issues within Very-large-scale integration.
Massimo Alioto mostly deals with Voltage, Electrical engineering, Embedded system, Scalability and Microcontroller. His study in Voltage is interdisciplinary in nature, drawing from both Capacitive sensing and Standard cell. The study incorporates disciplines such as Electronic engineering, Converters and Effective number of bits in addition to Standard cell.
He integrates several fields in his works, including Electronic engineering and Repeater insertion. His work on Comparator, Power Management Unit, Electronic circuit and Logic gate as part of general Electrical engineering research is frequently linked to Range, bridging the gap between disciplines. His research in Embedded system intersects with topics in Retiming, Efficient energy use, Control reconfiguration and Static random-access memory.
His primary areas of study are Voltage, Electrical engineering, Scalability, Pulse-width modulation and Design flow. Voltage is closely attributed to Electronic circuit in his study. Many of his research projects under Electrical engineering are closely connected to Range with Range, tying the diverse disciplines of science together.
The concepts of his Pulse-width modulation study are interwoven with issues in Converters, Electronic engineering, CMOS, Effective number of bits and Standard cell. His Electronic design automation course of study focuses on Pipeline and Very-large-scale integration. His Logic gate study improves the overall literature in Algorithm.
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Ultra-Low Power VLSI Circuit Design Demystified and Explained: A Tutorial
M. Alioto.
IEEE Transactions on Circuits and Systems I-regular Papers (2012)
Analysis and comparison on full adder block in submicron technology
M. Alioto;G. Palumbo.
IEEE Transactions on Very Large Scale Integration Systems (2002)
Understanding the Effect of Process Variations on the Delay of Static and Domino Logic
Massimo Alioto;Gaetano Palumbo;Melita Pennisi.
IEEE Transactions on Very Large Scale Integration Systems (2010)
Model and Design of Bipolar and MOS Current-Mode Logic: CML, ECL and SCL Digital Circuits
Massimo Alioto;Gaetano Palumbo.
(2005)
Understanding DC Behavior of Subthreshold CMOS Logic Through Closed-Form Analysis
Massimo Alioto.
IEEE Transactions on Circuits and Systems I-regular Papers (2010)
Enabling the Internet of Things: From Integrated Circuits to Integrated Systems
Massimo Alioto.
Published in <b>2017</b> (2017)
Leakage Power Analysis Attacks: A Novel Class of Attacks to Nanometer Cryptographic Circuits
M. Alioto;L. Giancane;G. Scotti;A. Trifiletti.
IEEE Transactions on Circuits and Systems I-regular Papers (2010)
Analysis and Comparison in the Energy-Delay-Area Domain of Nanometer CMOS Flip-Flops: Part I—Methodology and Design Strategies
M Alioto;E Consoli;G Palumbo.
IEEE Transactions on Very Large Scale Integration Systems (2011)
Design strategies for source coupled logic gates
M. Alioto;G. Palumbo.
IEEE Transactions on Circuits and Systems I-regular Papers (2003)
General Strategies to Design Nanometer Flip-Flops in the Energy-Delay Space
Massimo Alioto;Elio Consoli;Gaetano Palumbo.
IEEE Transactions on Circuits and Systems I-regular Papers (2010)
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