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D-Index & Metrics

Electronics and Electrical Engineering

D-Index
36
Citations
4985
World Ranking
5376
National Ranking
223

Overview

Felice Crupi is affiliated with the University of Calabria in Italy and has a focus on engineering, particularly within electrical and electronic engineering. Their research spans multiple subfields, including hardware and architecture, biomedical engineering, atomic and molecular physics, optics, and surgery.

The main topics of Crupi's work include:

  • Advanced Memory and Neural Computing
  • Ferroelectric and Negative Capacitance Devices
  • Physical Unclonable Functions (PUFs) and Hardware Security
  • Semiconductor materials and devices
  • Advancements in Semiconductor Devices and Circuit Design
  • Magnetic properties of thin films
  • Integrated Circuits and Semiconductor Failure Analysis

Frequent coauthors collaborating with Crupi are:

  • Raffaele De Rose
  • Marco Lanuzza
  • Massimo Vatalaro
  • Esteban Garzón
  • Lionel Trojman

Research findings by Crupi have been published in a variety of venues, with the most frequent being:

  • Solid-State Electronics
  • IEEE Transactions on Circuits & Systems II Express Briefs
  • Università della Calabria
  • IEEE Journal of Solid-State Circuits
  • IEEE Journal of Electromagnetics RF and Microwaves in Medicine and Biology

Some recent papers authored or co-authored by Crupi include:

  • "Trimming-Less Voltage Reference for Highly Uncertain Harvesting Down to 0.25 V, 5.4 pW," 2021, published in IEEE Journal of Solid-State Circuits
  • "A Robust, High-Speed and Energy-Efficient Ultralow-Voltage Level Shifter," 2020, published in IEEE Transactions on Circuits & Systems II Express Briefs
  • "Exploiting STT-MRAMs for Cryogenic Non-Volatile Cache Applications," 2021, published in IEEE Transactions on Nanotechnology
  • "A 0.05 mm², 350 mV, 14 nW Fully-Integrated Temperature Sensor in 180-nm CMOS," 2021, published in IEEE Transactions on Circuits & Systems II Express Briefs
  • "Assessment of STT-MRAMs based on double-barrier MTJs for cache applications by means of a device-to-system level simulation framework," 2020, published in Integration

Best Publications

  • A 2.6 nW, 0.45 V Temperature-Compensated Subthreshold CMOS Voltage Reference

    L Magnelli;F Crupi;P Corsonello;C Pace

  • $1/f$ Noise in Drain and Gate Current of MOSFETs With High- $k$ Gate Stacks

    P. Magnone;F. Crupi;G. Giusi;C. Pace

  • On the properties of the gate and substrate current after soft breakdown in ultrathin oxide layers

    F. Crupi;R. Degraeve;G. Groeseneken;T. Nigam

  • Design of a 75-nW, 0.5-V subthreshold complementary metal-oxide-semiconductor operational amplifier

    Luca Magnelli;Francesco A. Amoroso;Felice Crupi;Gregorio Cappuccino

  • Impact strain engineering on gate stack quality and reliability

    Corneel Claeys;Eddy Simoen;Sofie Put;G. Giusi

  • An Ultralow-Voltage Energy-Efficient Level Shifter

    Marco Lanuzza;Felice Crupi;Sandro Rao;Raffaele De Rose

  • Correlation between Stress-Induced Leakage Current (SILC) and the HfO/sub 2/ bulk trap density in a SiO/sub 2//HfO/sub 2/ stack

    F. Crupi;R. Degraeve;A. Kerber;D.H. Kwak

  • Degradation and hard breakdown transient of thin gate oxides in metal–SiO2–Si capacitors: Dependence on oxide thickness

    S. Lombardo;A. La Magna;C. Spinella;C. Gerardi

  • A Sub- ${oldsymbol kT}/oldsymbol q$ Voltage Reference Operating at 150 mV

    Domenico Albano;Felice Crupi;Francesca Cucchi;Giuseppe Iannaccone

  • Impact of TFET Unidirectionality and Ambipolarity on the Performance of 6T SRAM Cells

    Sebastiano Strangio;Pierpaolo Palestri;David Esseni;Luca Selmi

  • Mixed Tunnel-FET/MOSFET Level Shifters: A New Proposal to Extend the Tunnel-FET Application Domain

    Marco Lanuzza;Sebastiano Strangio;Felice Crupi;Pierpaolo Palestri

  • Impact of Hot Carriers on nMOSFET Variability in 45- and 65-nm CMOS Technologies

    P. Magnone;F. Crupi;N. Wils;R. Jain

  • Digital and analog TFET circuits: Design and benchmark

    Sebastiano Strangio;Sebastiano Strangio;Francesco Settino;Francesco Settino;P. Palestri;M. Lanuzza

  • Comparative study of drain and gate low-frequency noise in nMOSFETs with hafnium-based gate dielectrics

    Gino Giusi;F. Crupi;C. Pace;C. Ciofi

  • Impact of the interfacial layer on the low-frequency noise (1/f) behavior of MOSFETs with advanced gate stacks

    F. Crupi;P. Srinivasan;P. Magnone;E. Simoen

  • Electrical and thermal transient during dielectric breakdown of thin oxides in metal-SiO2-silicon capacitors

    S. Lombardo;F. Crupi;A. La Magna;C. Spinella

  • Understanding the Potential and Limitations of Tunnel FETs for Low-Voltage Analog/Mixed-Signal Circuits

    Francesco Settino;Marco Lanuzza;Sebastiano Strangio;Felice Crupi

  • Positive Bias Temperature Instability in nMOSFETs with ultra-thin Hf-silicate gate dielectrics

    F. Crupi;C. Pace;G. Cocorullo;G. Groeseneken

  • Structural and electrical analysis of the atomic layer deposition of HfO2/n-In0.53Ga0.47As capacitors with and without an Al2O3 interface control layer

    Aileen O'Mahony;Scott Monaghan;G. Provenzano;Ian M. Povey

  • Observation of hot-carrier-induced nFET gate-oxide breakdown in dynamically stressed CMOS circuits

    B. Kaczer;F. Crupi;R. Degraeve;Ph. Roussel

  • On the Temperature and Field Dependence of Trap-Assisted Tunneling Current in Ge $\hbox{p}^{+}\hbox{n}$ Junctions

    E. Simoen;F. De Stefano;G. Eneman;B. De Jaeger

Frequent Co-Authors

Giuseppe Iannaccone
Giuseppe Iannaccone University of Pisa
Eddy Simoen
Eddy Simoen Ghent University
Massimo Alioto
Massimo Alioto National University of Singapore
Pierpaolo Palestri
Pierpaolo Palestri University of Udine
Cor Claeys
Cor Claeys KU Leuven
David Esseni
David Esseni University of Udine

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