World's Best Scientists 2026 revealed!
Naoto Horiguchi

Naoto Horiguchi

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
38
Citations
6900
World Ranking
4863
National Ranking
104

Naoto Horiguchi publication distribution in Electronics and Electrical Engineering in 2026

The chart shows the distribution of publications by all Research.com ranked scientists in the field of Electronics and Electrical Engineering in 2026. The highlighted bar marks where Naoto Horiguchi sits on this spectrum.

34–53 publications: 24 scientists 54–73 publications: 52 scientists 74–93 publications: 114 scientists 94–113 publications: 203 scientists 114–133 publications: 269 scientists 134–153 publications: 355 scientists 154–173 publications: 403 scientists 174–193 publications: 445 scientists 194–213 publications: 430 scientists 214–233 publications: 431 scientists 234–253 publications: 399 scientists 254–273 publications: 366 scientists 274–293 publications: 335 scientists 294–313 publications: 300 scientists 314–333 publications: 276 scientists 334–353 publications: 250 scientists 354–373 publications: 214 scientists 374–393 publications: 187 scientists 394–413 publications: 152 scientists 414–433 publications: 169 scientists 434–453 publications: 147 scientists 454–473 publications: 111 scientists 474–493 publications: 117 scientists 494–513 publications: 103 scientists 514–533 publications: 99 scientists 534–553 publications: 92 scientists 554–573 publications: 75 scientists 574–593 publications: 58 scientists 594–613 publications: 69 scientists 614–633 publications: 50 scientists 634–653 publications: 62 scientists 654–673 publications: 54 scientists 674–693 publications: 44 scientists 694–713 publications: 37 scientists 714–733 publications: 28 scientists 734–753 publications: 26 scientists 754–773 publications: 26 scientists 774–793 publications: 19 scientists 794–813 publications: 23 scientists 814–833 publications: 20 scientists 834–853 publications: 16 scientists 854–873 publications: 20 scientists 874–893 publications: 11 scientists 894–913 publications: 11 scientists 914–933 publications: 16 scientists 934–953 publications: 13 scientists 954–973 publications: 10 scientists 974–993 publications: 11 scientists 994–1,013 publications: 9 scientists 1,014–1,033 publications: 9 scientists 1,034–1,053 publications: 10 scientists 1,054–1,064 publications: 6 scientists 1,065+ publications: 99 scientists
34 publications 1,065+

This scientist: 563 publications — 89th percentile

89% of scientists in this discipline score the same or lower.

The last bar groups every scientist with 1,065 publications or more.

Naoto Horiguchi D-index placement in Electronics and Electrical Engineering in 2026

The chart shows the D-index (discipline H-index) distribution of Electronics and Electrical Engineering scientists ranked by Research.com in 2026. The highlighted bar marks where Naoto Horiguchi sits on this spectrum.

30 D-Index: 178 scientists 31 D-Index: 257 scientists 32 D-Index: 263 scientists 33 D-Index: 262 scientists 34 D-Index: 244 scientists 35 D-Index: 236 scientists 36 D-Index: 211 scientists 37 D-Index: 220 scientists 38 D-Index: 214 scientists 39 D-Index: 214 scientists 40 D-Index: 205 scientists 41 D-Index: 187 scientists 42 D-Index: 194 scientists 43 D-Index: 201 scientists 44 D-Index: 155 scientists 45 D-Index: 189 scientists 46 D-Index: 148 scientists 47 D-Index: 160 scientists 48 D-Index: 134 scientists 49 D-Index: 130 scientists 50 D-Index: 141 scientists 51 D-Index: 156 scientists 52 D-Index: 108 scientists 53 D-Index: 130 scientists 54 D-Index: 112 scientists 55 D-Index: 97 scientists 56 D-Index: 111 scientists 57 D-Index: 102 scientists 58 D-Index: 108 scientists 59 D-Index: 120 scientists 60 D-Index: 103 scientists 61 D-Index: 93 scientists 62 D-Index: 92 scientists 63 D-Index: 74 scientists 64 D-Index: 77 scientists 65 D-Index: 73 scientists 66 D-Index: 64 scientists 67 D-Index: 69 scientists 68 D-Index: 60 scientists 69 D-Index: 39 scientists 70 D-Index: 57 scientists 71 D-Index: 59 scientists 72 D-Index: 46 scientists 73 D-Index: 49 scientists 74 D-Index: 38 scientists 75 D-Index: 35 scientists 76 D-Index: 32 scientists 77 D-Index: 35 scientists 78 D-Index: 31 scientists 79 D-Index: 22 scientists 80 D-Index: 34 scientists 81 D-Index: 31 scientists 82 D-Index: 34 scientists 83 D-Index: 23 scientists 84 D-Index: 18 scientists 85 D-Index: 30 scientists 86 D-Index: 19 scientists 87 D-Index: 19 scientists 88 D-Index: 20 scientists 89 D-Index: 8 scientists 90 D-Index: 17 scientists 91 D-Index: 7 scientists 92 D-Index: 14 scientists 93 D-Index: 9 scientists 94 D-Index: 15 scientists 95 D-Index: 10 scientists 96 D-Index: 12 scientists 97 D-Index: 10 scientists 98 D-Index: 10 scientists 99 D-Index: 12 scientists 100 D-Index: 16 scientists 101 D-Index: 5 scientists 102 D-Index: 7 scientists 103 D-Index: 7 scientists 104 D-Index: 8 scientists 105 D-Index: 9 scientists 106 D-Index: 13 scientists 107 D-Index: 4 scientists 108 D-Index: 5 scientists 109 D-Index: 10 scientists 110 D-Index: 8 scientists 111+ D-Index: 96 scientists
30 D-Index 111+

This scientist: 38 D-Index — 30th percentile

30% of scientists in this discipline score the same or lower.

The last bar groups every scientist with 111 D-Index or more.

Overview

Naoto Horiguchi is affiliated with Imec in Belgium and has a significant research footprint in the field of engineering, focusing primarily on electrical and electronic engineering. Their work spans various subfields including biomedical engineering, atomic and molecular physics and optics, materials chemistry, and electronic, optical, and magnetic materials.

The scientist's research topics cover several key areas such as semiconductor materials and devices, advancements in semiconductor devices and circuit design, integrated circuits and semiconductor failure analysis, nanowire synthesis and applications, thin-film transistor technologies, ferroelectric and negative capacitance devices, and semiconductor materials and interfaces.

Horiguchi has contributed to numerous papers, including the following notable recent publications:

  • "Nondestructive, high-resolution, chemically specific 3D nanostructure characterization using phase-sensitive EUV imaging reflectometry," 2021, Science Advances
  • "Buried Power Rail Integration With FinFETs for Ultimate CMOS Scaling," 2020, IEEE Transactions on Electron Devices
  • "Comparison of Electrical Performance of Co-Integrated Forksheets and Nanosheets Transistors for the 2nm Technological Node and Beyond," 2021, 2021 IEEE International Electron Devices Meeting (IEDM)
  • "Low-Frequency Noise in Vertically Stacked Si n-Channel Nanosheet FETs," 2020, IEEE Electron Device Letters
  • "Forksheet FETs with Bottom Dielectric Isolation, Self-Aligned Gate Cut, and Isolation between Adjacent Source-Drain Structures," 2022, 2022 International Electron Devices Meeting (IEDM)

Their frequent coauthors include:

  • Hans Mertens
  • E. Dentoni Litta
  • A. Veloso
  • Roger Loo
  • R. Ritzenthaler

Horiguchi's publications are often found in specific venues related to electrical engineering and semiconductor research, such as:

  • ECS Meeting Abstracts
  • IEEE Transactions on Electron Devices
  • ECS Transactions
  • 2022 International Electron Devices Meeting (IEDM)
  • Solid-State Electronics

Best Publications

  • Gate-all-around MOSFETs based on vertically stacked horizontal Si nanowires in a replacement metal gate process on bulk Si substrates

    H. Mertens;R. Ritzenthaler;A. Hikavyy;M. S. Kim

  • The Complementary FET (CFET) for CMOS scaling beyond N3

    J. Ryckaert;P. Schuddinck;P. Weckx;G. Bouche

  • Vertically stacked gate-all-around Si nanowire CMOS transistors with dual work function metal gates

    H. Mertens;R. Ritzenthaler;A. Chasin;T. Schram

  • Vertically stacked gate-all-around Si nanowire transistors: Key Process Optimizations and Ring Oscillator Demonstration

    H. Mertens;R. Ritzenthaler;V. Pena;G. Santoro

  • Impact of single charged gate oxide defects on the performance and scaling of nanoscaled FETs

    J. Franco;B. Kaczer;M. Toledano-Luque;Ph. J. Roussel

  • Future Logic Scaling: Towards Atomic Channels and Deconstructed Chips

    S. B. Samavedam;J. Ryckaert;E. Beyne;K. Ronse

  • Novel forksheet device architecture as ultimate logic scaling device towards 2nm

    P. Weckx;M. Gupta;Y. Oniki;L.-A. Ragnarsson

  • Bulk FinFET fabrication with new approaches for oxide topography control using dry removal techniques

    A. Redolfi;S. Kubicek;R. Rooyackers;M.-S. Kim

  • First Monolithic Integration of 3D Complementary FET (CFET) on 300mm Wafers

    S. Subramanian;M. Hosseini;T. Chiarella;S. Sarkar

  • Response of a single trap to AC negative Bias Temperature stress

    M. Toledano-Luque;B. Kaczer;Ph.J. Roussel;T. Grasser

  • Vertically Stacked Gate-All-Around Si Nanowire CMOS Transistors with Reduced Vertical Nanowires Separation, New Work Function Metal Gate Solutions, and DC/AC Performance Optimization

    R. Ritzenthaler;H. Mertens;V. Pena;G. Santoro

  • Multiring Circular Transmission Line Model for Ultralow Contact Resistivity Extraction

    Hao Yu;Marc Schaekers;Tom Schram;Erik Rosseel

  • Channel Hot Carrier Degradation Mechanism in Long/Short Channel $n$ -FinFETs

    Moonju Cho;Philippe Roussel;Ben Kaczer;Robin Degraeve

  • QUANTUM DOT INFRARED PHOTODETECTOR USING MODULATION DOPED INAS SELF-ASSEMBLED QUANTUM DOTS

    Naoto Horiguchi;Toshiro Futatsugi;Yoshiaki Nakata;Naoki Yokoyama

  • Microstructure and electrical properties of Sn nanocrystals in thin, thermally grown SiO2 layers formed via low energy ion implantation

    Anri Nakajima;Toshiro Futatsugi;Hiroshi Nakao;Tatsuya Usuki

  • Technology booster using strain-enhancing laminated SiN (SELS) for 65nm node HP MPUs

    K. Goto;S. Satoh;H. Ohta;S. Fukuta

  • Formation of Sn nanocrystals in thin SiO2 film using low-energy ion implantation

    Anri Nakajima;Toshiro Futatsugi;Naoto Horiguchi;Naoki Yokoyama

  • 1.5×10−9 Ωcm2 Contact resistivity on highly doped Si:P using Ge pre-amorphization and Ti silicidation

    H. Yu;M. Schaekers;E. Rosseel;A. Peter

  • Nanowire & nanosheet FETs for ultra-scaled, high-density logic and memory applications

    A. Veloso;T. Huynh-Bao;P. Matagne;D. Jang

  • Integration of InGaAs Channel n-MOS Devices on 200mm Si Wafers Using the Aspect-Ratio-Trapping Technique

    Niamh Waldron;Gang Wang;Ngoc Duy Nguyen;Tommaso Orzali

  • Characterization of Epitaxial Si:C:P and Si:P Layers for Source/Drain Formation in Advanced Bulk FinFETs

    Erik Rosseel;Harald Benjamin Profijt;Andriy Yakovitch Hikavyy;John Tolle

  • Extreme scaling enabled by 5 tracks cells: Holistic design-device co-optimization for FinFETs and lateral nanowires

    M. Garcia Bardon;Y. Sherazi;P. Schuddinck;D. Jang

Frequent Co-Authors

Aaron Thean
Aaron Thean National University of Singapore
Eddy Simoen
Eddy Simoen Ghent University
Hao Yu
Hao Yu South China University of Technology

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