Naoto Horiguchi spends much of his time researching Optoelectronics, Electronic engineering, Logic gate, MOSFET and Doping. His Optoelectronics study combines topics in areas such as Metal gate, Nanotechnology and Electrical engineering. His biological study spans a wide range of topics, including PMOS logic, Wafer and Germanium.
His work deals with themes such as Negative-bias temperature instability, Work function, Silicon-germanium, CMOS and Scaling, which intersect with Logic gate. His MOSFET research is multidisciplinary, incorporating elements of Low voltage, NMOS logic and Fin. His Doping research integrates issues from Quantum dot and Quantum dot laser.
Naoto Horiguchi mainly investigates Optoelectronics, Electronic engineering, Transistor, Logic gate and CMOS. His Optoelectronics research incorporates themes from Metal gate, Electrical engineering and MOSFET. Naoto Horiguchi focuses mostly in the field of Electronic engineering, narrowing it down to topics relating to NMOS logic and, in certain cases, Tin.
He has researched Transistor in several fields, including Dram, High-κ dielectric and Leakage. His work in Logic gate covers topics such as Silicon which are related to areas like Fin. His study in Doping is interdisciplinary in nature, drawing from both Ion implantation, Nanotechnology and Electrical resistivity and conductivity.
Naoto Horiguchi mostly deals with Optoelectronics, Nanowire, Scaling, Transistor and Metal gate. His Optoelectronics study combines topics from a wide range of disciplines, such as Field-effect transistor, Nanosheet and Logic gate. His biological study spans a wide range of topics, including NMOS logic, Condensed matter physics, Gallium arsenide, PMOS logic and Silicon-germanium.
His Nanowire research includes elements of Parasitic element and Stress. His Metal gate study also includes fields such as
His primary areas of investigation include Optoelectronics, Nanowire, Metal gate, Condensed matter physics and Silicon. His study in the fields of Dram under the domain of Optoelectronics overlaps with other disciplines such as Stacking. As part of one scientific family, Naoto Horiguchi deals mainly with the area of Nanowire, narrowing it down to issues related to the Nanosheet, and often Efficient energy use and Noise.
His Metal gate study combines topics in areas such as Threshold voltage, Negative-bias temperature instability and NMOS logic. His Condensed matter physics research is multidisciplinary, incorporating perspectives in Gate oxide, Work function, Logic gate and Ferroelectricity. His study on Germanium is often connected to Infrasound as part of broader study in Silicon.
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Gate-all-around MOSFETs based on vertically stacked horizontal Si nanowires in a replacement metal gate process on bulk Si substrates
H. Mertens;R. Ritzenthaler;A. Hikavyy;M. S. Kim.
symposium on vlsi technology (2016)
Impact of single charged gate oxide defects on the performance and scaling of nanoscaled FETs
J. Franco;B. Kaczer;M. Toledano-Luque;Ph. J. Roussel.
international reliability physics symposium (2012)
Vertically stacked gate-all-around Si nanowire CMOS transistors with dual work function metal gates
H. Mertens;R. Ritzenthaler;A. Chasin;T. Schram.
international electron devices meeting (2016)
Bulk FinFET fabrication with new approaches for oxide topography control using dry removal techniques
A. Redolfi;S. Kubicek;R. Rooyackers;M.-S. Kim.
Solid-state Electronics (2012)
Response of a single trap to AC negative Bias Temperature stress
M. Toledano-Luque;B. Kaczer;Ph.J. Roussel;T. Grasser.
international reliability physics symposium (2011)
QUANTUM DOT INFRARED PHOTODETECTOR USING MODULATION DOPED INAS SELF-ASSEMBLED QUANTUM DOTS
Naoto Horiguchi;Toshiro Futatsugi;Yoshiaki Nakata;Naoki Yokoyama.
Japanese Journal of Applied Physics (1999)
Vertically stacked gate-all-around Si nanowire transistors: Key Process Optimizations and Ring Oscillator Demonstration
H. Mertens;R. Ritzenthaler;V. Pena;G. Santoro.
international electron devices meeting (2017)
Microstructure and electrical properties of Sn nanocrystals in thin, thermally grown SiO2 layers formed via low energy ion implantation
Anri Nakajima;Toshiro Futatsugi;Hiroshi Nakao;Tatsuya Usuki.
Journal of Applied Physics (1998)
Technology booster using strain-enhancing laminated SiN (SELS) for 65nm node HP MPUs
K. Goto;S. Satoh;H. Ohta;S. Fukuta.
international electron devices meeting (2004)
Formation of Sn nanocrystals in thin SiO2 film using low-energy ion implantation
Anri Nakajima;Toshiro Futatsugi;Naoto Horiguchi;Naoki Yokoyama.
Applied Physics Letters (1997)
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