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Cor Claeys

Cor Claeys

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
51
Citations
14171
World Ranking
2598
National Ranking
58

Research.com Recognitions

  • 2009 - IEEE Fellow For contributions to semiconductor device physics, defect engineering, and low frequency noise characterization

Overview

Cor Claeys is affiliated with KU Leuven in Belgium and has made contributions primarily in the field of Engineering, with a focus on Electrical and Electronic Engineering. Their research covers a variety of topics related to semiconductor technology and device physics.

Their recent work includes publications such as:

  • Low-Frequency Noise in Vertically Stacked Si n-Channel Nanosheet FETs (2020, IEEE Electron Device Letters)
  • Low-Frequency Noise Assessment of Vertically Stacked Si n-Channel Nanosheet FETs With Different Metal Gates (2020, IEEE Transactions on Electron Devices)
  • Analog design with Line-TFET device experimental data: from device to circuit level (2020, Semiconductor Science and Technology)
  • Low frequency noise performance of horizontal, stacked and vertical silicon nanowire MOSFETs (2021, Solid-State Electronics)
  • Low-Frequency Noise Characterization of Germanium n-Channel FinFETs (2020, IEEE Transactions on Electron Devices)

Their research interests encompass several main topics, including:

  • Semiconductor materials and devices
  • Advancements in Semiconductor Devices and Circuit Design
  • Integrated Circuits and Semiconductor Failure Analysis
  • Nanowire Synthesis and Applications
  • Silicon Carbide Semiconductor Technologies
  • Ferroelectric and Negative Capacitance Devices
  • Semiconductor Quantum Structures and Devices

Claeys has frequently published in specific venues such as:

  • IEEE Transactions on Electron Devices
  • Journal of Integrated Circuits and Systems
  • Solid-State Electronics
  • ECS Meeting Abstracts
  • ECS Transactions

The scientist collaborates with several co-authors regularly, including Eddy Simoen, João Antônio Martino, A. Veloso, R Todi, and F Guarin. These collaborations have led to a significant body of work related to semiconductor devices and their performance characteristics.

Claeys's work is rooted in the subfields of Electrical and Electronic Engineering, Atomic and Molecular Physics, Biomedical Engineering, Condensed Matter Physics, and Materials Chemistry.

In recognition of their contributions to semiconductor device physics, defect engineering, and low frequency noise characterization, Claeys was named an IEEE Fellow in 2009.

Best Publications

  • Germanium-based technologies : from materials to devices

    Cor L. Claeys;E. Simoen

  • Radiation Effects in Advanced Semiconductor Materials and Devices

    Cor L. Claeys;Eddy R. Simoen

  • Silicon-on-insulator 'gate-all-around device'

    J.P. Colinge;M.H. Gao;A. Romano-Rodriguez;H. Maes

  • On the flicker noise in submicron silicon MOSFETs

    Eddy Simoen;Cor Claeys

  • Explaining the amplitude of RTS noise in submicrometer MOSFETs

    E. Simoen;B. Dierickx;C.L. Claeys;G.J. Declerck

  • A Foveated Retina-Like Sensor Using CCD Technology

    J. Van der Spiegel;G. Kreider;C. Claeys;I. Debusschere

  • Characterization of front and back Si-SiO/sub 2/ interfaces in thick- and thin-film silicon-on-insulator MOS structures by the charge-pumping technique

    D.J. Wouters;M.R. Tack;G.V. Groeseneken;H.E. Maes

  • "Linear kink effect" induced by electron valence band tunneling in ultrathin gate oxide bulk and SOI MOSFETS

    A. Mercha;J.M. Rafi;E. Simoen;E. Augendre

  • $1/f$ Noise in Drain and Gate Current of MOSFETs With High- $k$ Gate Stacks

    P. Magnone;F. Crupi;G. Giusi;C. Pace

  • Radiation Effects in Advanced Multiple Gate and Silicon-on-Insulator Transistors

    E. Simoen;M. Gaillardin;P. Paillet;R. A. Reed

  • Low-frequency noise behavior of SiO/sub 2/--HfO/sub 2/ dual-layer gate dielectric nMOSFETs with different interfacial oxide thickness

    E. Simoen;A. Mercha;L. Pantisano;C. Claeys

  • Germanium-Based Technologies

    C Claeys;E Simoen

  • A 1006 element hybrid silicon pixel detector with strobed binary output

    F. Anghinolfi;P. Aspell;K. Bass;W. Beusch

  • Gettering mechanisms in silicon

    Ml Polignano;Gf Cerofolini;H Bender;Corneel Claeys

  • Impact strain engineering on gate stack quality and reliability

    Corneel Claeys;Eddy Simoen;Sofie Put;G. Giusi

  • Low-Frequency Noise Analysis and Modeling in Vertical Tunnel FETs With Ge Source

    Felipe S. Neves;Paula G. D. Agopian;Joao Antonio Martino;Bogdan Cretu

  • Model for hysteresis and kink behavior of MOS transistors operating at 4.2 K

    B. Dierickx;L. Warmerdam;E.R. Simoen;J. Vermeiren

  • Impact of Donor Concentration, Electric Field, and Temperature Effects on the Leakage Current in Germanium p $+/$ n Junctions

    G. Eneman;M. Wiot;A. Brugere;O.S.I. Casain

  • Impact of oxygen related extended defects on silicon diode characteristics

    Jan Vanhellemont;Eddy Simoen;Arvydas Kaniava;Milan Libezny

  • Challenges and opportunities in advanced Ge pMOSFETs

    E Simoen;J Mitard;Geert Hellings;Geert Eneman

  • Impact of Fe and Cu Contamination on the Minority Carrier Lifetime of Silicon Substrates

    A. L. P. Rotondaro;T. Q. Hurd;A. Kaniava;J. Vanhellemont

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