His research investigates the connection between System on a chip and topics such as Embedded system that intersect with problems in Field-programmable gate array, Very-large-scale integration and Reconfigurable computing. He performs multidisciplinary study in Field-programmable gate array and Embedded system in his work. He integrates Operating system and Software portability in his studies. His work on Interfacing expands to the thematically related Computer hardware. His Interfacing study frequently draws connections between adjacent fields such as Computer hardware. Paolo Ienne performs integrative study on Software and Computer architecture. He connects Computer architecture with Software in his research. He performs integrative study on Parallel computing and Very-large-scale integration in his works. His study deals with a combination of Telecommunications and Electronic engineering.
His Programming language research is intertwined with Set (abstract data type) and Instruction set. In most of his Set (abstract data type) studies, his work intersects topics such as Programming language. He integrates Embedded system and Very-large-scale integration in his studies. He combines Very-large-scale integration and Embedded system in his research. Paolo Ienne integrates many fields, such as Parallel computing and Algorithm, in his works. Paolo Ienne integrates many fields in his works, including Algorithm and Parallel computing. His research is interdisciplinary, bridging the disciplines of Overhead (engineering) and Operating system. Overhead (engineering) is closely attributed to Operating system in his study. In his works, he undertakes multidisciplinary study on Computer architecture and Software.
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ShiDianNao: shifting vision processing closer to the sensor
Zidong Du;Robert Fasthuber;Tianshi Chen;Paolo Ienne.
international symposium on computer architecture (2015)
Mobile Robot Miniaturisation: A Tool for Investigation in Control Algorithms
Francesco Mondada;Edoardo Franzi;Paolo Ienne.
international symposium on experimental robotics (1993)
Automatic application-specific instruction-set extensions under microarchitectural constraints
Kubilay Atasu;Laura Pozzi;Paolo Ienne.
International Journal of Parallel Programming (2003)
Variable latency speculative addition: a new paradigm for arithmetic circuit design
Ajay K. Verma;Philip Brisk;Paolo Ienne.
design, automation, and test in europe (2008)
Exact and approximate algorithms for the extension of embedded processor instruction sets
L. Pozzi;K. Atasu;P. Ienne.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2006)
Customizable Embedded Processors: Design Technologies and Applications
Paolo Ienne;Rainer Leupers.
Seamless hardware-software integration in reconfigurable computing systems
M. Vuletid;L. Pozzi;P. Ienne.
IEEE Design & Test of Computers (2005)
Wear unleveling: improving NAND flash lifetime by balancing page endurance
Xavier Jimenez;David Novo;Paolo Ienne.
file and storage technologies (2014)
An adaptive low-power transmission scheme for on-chip networks
F. Worm;P. Ienne;P. Thiran;G. de micheli.
international symposium on systems synthesis (2002)
Exploiting pipelining to relax register-file port constraints of instruction-set extensions
Laura Pozzi;Paolo Ienne.
compilers, architecture, and synthesis for embedded systems (2005)
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