Joel Emer

D-Index & Metrics D-index (Discipline H-index) only includes papers and citation values for an examined discipline in contrast to General H-index which accounts for publications across all disciplines.

Discipline name Citations Publications World Ranking National Ranking

Computer Science D-index 63 Citations 24,925 177 World Ranking 1692 National Ranking 927

Research.com Recognitions

Awards & Achievements

2020 - Member of the National Academy of Engineering For quantitative analysis of computer architecture and its application to architectural innovation in commercial microprocessors.

2009 - ACM - IEEE CS Eckert-Mauchly Award For pioneering contributions to performance analysis and modeling methodologies; for design innovations in several significant industry microprocessors; and for deftly bridging research and development, academia and industry.

2004 - IEEE Fellow For contributions to computer architecture and quantitative analysis of processor performance.

2004 - ACM Fellow For contributions to computer architecture and performance analysis.

Best Publications

Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks

Yu-Hsin Chen;Tushar Krishna;Joel S. Emer;Vivienne Sze.
IEEE Journal of Solid-state Circuits (2017)

2452 Citations

Efficient Processing of Deep Neural Networks: A Tutorial and Survey

Vivienne Sze;Yu-Hsin Chen;Tien-Ju Yang;Joel S. Emer.
Proceedings of the IEEE (2017)

2376 Citations

14.5 Eyeriss: An energy-efficient reconfigurable accelerator for deep convolutional neural networks

Yu-Hsin Chen;Tushar Krishna;Joel Emer;Vivienne Sze.
international solid-state circuits conference (2016)

2266 Citations

Eyeriss: a spatial architecture for energy-efficient dataflow for convolutional neural networks

Yu-Hsin Chen;Joel Emer;Vivienne Sze.
international symposium on computer architecture (2016)

1257 Citations

Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor

Dean M. Tullsen;Susan J. Eggers;Joel S. Emer;Henry M. Levy.
international symposium on computer architecture (1996)

1216 Citations

A systematic methodology to compute the architectural vulnerability factors for a high-performance microprocessor

Shubhendu S. Mukherjee;Christopher Weaver;Joel Emer;Steven K. Reinhardt.
international symposium on microarchitecture (2003)

1195 Citations

Eyeriss: a spatial architecture for energy-efficient dataflow for convolutional neural networks

Yu-Hsin Chen;Joel Emer;Vivienne Sze.
international symposium on computer architecture (2016)

991 Citations

Adaptive insertion policies for high performance caching

Moinuddin K. Qureshi;Aamer Jaleel;Yale N. Patt;Simon C. Steely.
international symposium on computer architecture (2007)

885 Citations

High performance cache replacement using re-reference interval prediction (RRIP)

Aamer Jaleel;Kevin B. Theobald;Simon C. Steely;Joel Emer.
international symposium on computer architecture (2010)

823 Citations

SCNN: An Accelerator for Compressed-sparse Convolutional Neural Networks

Angshuman Parashar;Minsoo Rhu;Anurag Mukkara;Antonio Puglielli.
international symposium on computer architecture (2017)

812 Citations

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Joel Emer

D-Index & Metrics D-index (Discipline H-index) only includes papers and citation values for an examined discipline in contrast to General H-index which accounts for publications across all disciplines.

Research.com Recognitions

Awards & Achievements

Best Publications

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