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Computer Science

D-Index
42
Citations
7761
World Ranking
8358
National Ranking
1088

Overview

Leibo Liu is affiliated with Tsinghua University in China and has a research portfolio encompassing computer science and engineering, with a specific focus on electrical and electronic engineering and artificial intelligence. Their work extends into hardware and architecture, computer vision and pattern recognition, and computer networks and communications.

Their recent publications include the following papers:

  • Approximate Arithmetic Circuits: A Survey, Characterization, and Recent Applications (2020), published in Proceedings of the IEEE
  • Highly Efficient Architecture of NewHope-NIST on FPGA using Low-Complexity NTT/INTT (2020), published in IACR Transactions on Cryptographic Hardware and Embedded Systems
  • A 28nm 29.2TFLOPS/W BF16 and 36.5TOPS/W INT8 Reconfigurable Digital CIM Processor with Unified FP/INT Pipeline and Bitwise In-Memory Booth Multiplication for Cloud Deep Learning Acceleration (2022), published in 2022 IEEE International Solid-State Circuits Conference (ISSCC)
  • LWRpro: An Energy-Efficient Configurable Crypto-Processor for Module-LWR (2021), published in IEEE Transactions on Circuits and Systems I Regular Papers
  • A Compact and High-Performance Hardware Architecture for CRYSTALS-Dilithium (2021), published in IACR Transactions on Cryptographic Hardware and Embedded Systems

They frequently collaborate with several co-authors, including:

  • Shaojun Wei (70 joint publications)
  • Shouyi Yin (55 joint publications)
  • Jianfeng Zhu (18 joint publications)
  • Bohan Yang (15 joint publications)
  • Wenping Zhu (14 joint publications)

Their research is frequently published in venues such as:

  • IEEE Journal of Solid-State Circuits (19 publications)
  • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (13 publications)
  • IEEE Transactions on Circuits and Systems I Regular Papers (12 publications)
  • IACR Transactions on Cryptographic Hardware and Embedded Systems (11 publications)
  • IEEE Transactions on Parallel and Distributed Systems (7 publications)

Leibo Liu's main research fields are computer science and engineering, while their subfields of study emphasize electrical and electronic engineering, artificial intelligence, hardware and architecture, computer vision and pattern recognition, and computer networks and communications.

The main topics explored in their research include:

  • Advanced Memory and Neural Computing
  • Ferroelectric and Negative Capacitance Devices
  • Parallel Computing and Optimization Techniques
  • Advanced Neural Network Applications
  • Coding Theory and Cryptography
  • Cryptographic Implementations and Security
  • Embedded Systems Design Techniques

Best Publications

  • Deep Convolutional Neural Network Architecture With Reconfigurable Computation Patterns

    Fengbin Tu;Shouyi Yin;Peng Ouyang;Shibin Tang

  • Approximate Arithmetic Circuits: A Survey, Characterization, and Recent Applications

    Honglan Jiang;Francisco Javier Hernandez Santiago;Hai Mo;Leibo Liu

  • A Review, Classification, and Comparative Evaluation of Approximate Arithmetic Circuits

    Honglan Jiang;Cong Liu;Leibo Liu;Fabrizio Lombardi

  • FP-BNN

    Shuang Liang;Shouyi Yin;Leibo Liu;Wayne Luk

  • Analog circuit optimization system based on hybrid evolutionary algorithms

    Bo Liu;Yan Wang;Zhiping Yu;Leibo Liu

  • A High Energy Efficient Reconfigurable Hybrid Neural Network Processor for Deep Learning Applications

    Shouyi Yin;Peng Ouyang;Shibin Tang;Fengbin Tu

  • A Survey of Coarse-Grained Reconfigurable Architecture and Design: Taxonomy, Challenges, and Applications

    Leibo Liu;Jianfeng Zhu;Zhaoshi Li;Yanan Lu

  • A 28nm 29.2TFLOPS/W BF16 and 36.5TOPS/W INT8 Reconfigurable Digital CIM Processor with Unified FP/INT Pipeline and Bitwise In-Memory Booth Multiplication for Cloud Deep Learning Acceleration

    Unknown

  • Highly Efficient Architecture of NewHope-NIST on FPGA using Low-Complexity NTT/INTT

    Neng Zhang;Bohan Yang;Chen Chen;Shouyi Yin

  • A 1.06-to-5.09 TOPS/W reconfigurable hybrid-neural-network processor for deep learning applications

    Shouyi Yin;Peng Ouyang;Shibin Tang;Fengbin Tu

  • Multibank memory optimization for parallel data access in multiple data arrays

    Shouyi Yin;Zhicong Xie;Chenyue Meng;Leibo Liu

  • A 5.1pJ/Neuron 127.3us/Inference RNN-based Speech Recognition Processor using 16 Computing-in-Memory SRAM Macros in 65nm CMOS

    Ruiqi Guo;Yonggang Liu;Shixuan Zheng;Ssu-Yen Wu

  • FACT: FFN-Attention Co-optimized Transformer Architecture with Eager Correlation Prediction

    Unknown

  • Polyhedral model based mapping optimization of loop nests for CGRAs

    Dajiang Liu;Shouyi Yin;Leibo Liu;Shaojun Wei

  • A 28nm 15.59µJ/Token Full-Digital Bitline-Transpose CIM-Based Sparse Transformer Accelerator with Pipeline/Parallel Reconfigurable Modes

    Unknown

  • RANA: towards efficient neural acceleration with refresh-optimized embedded DRAM

    Fengbin Tu;Weiwei Wu;Shouyi Yin;Leibo Liu

  • A Compact and High-Performance Hardware Architecture for CRYSTALS-Dilithium

    Cankun Zhao;Neng Zhang;Hanning Wang;Bohan Yang

  • A 141 UW, 2.46 PJ/Neuron Binarized Convolutional Neural Network Based Self-Learning Speech Recognition Processor in 28NM CMOS

    Shouyi Yin;Peng Ouyang;Shixuan Zheng;Dandan Song

  • An Implementation of Fast-Locking and Wide-Range 11-bit Reversible SAR DLL

    Lei Wang;Leibo Liu;Hongyi Chen

  • A VLSI architecture of JPEG2000 encoder

    Leibo Liu;Ning Chen;Hongying Meng;Li Zhang

  • ReDCIM: Reconfigurable Digital Computing- In -Memory Processor With Unified FP/INT Pipeline for Cloud AI Acceleration

    Unknown

  • LWRpro: An Energy-Efficient Configurable Crypto-Processor for Module-LWR

    Yihong Zhu;Min Zhu;Bohan Yang;Wenping Zhu

  • 9.2A 28nm 12.1TOPS/W Dual-Mode CNN Processor Using Effective-Weight-Based Convolution and Error-Compensation-Based Prediction

    Huiyu Mo;Wenping Zhu;Wenjing Hu;Guangbin Wang

  • An Energy-Efficient Reconfigurable Processor for Binary-and Ternary-Weight Neural Networks With Flexible Data Bit Width

    Shouyi Yin;Peng Ouyang;Jianxun Yang;Tianyi Lu

  • A High-Performance and Energy-Efficient FIR Adaptive Filter Using Approximate Distributed Arithmetic Circuits

    Honglan Jiang;Leibo Liu;Pieter P. Jonker;Duncan G. Elliott

Frequent Co-Authors

Shaojun Wei
Shaojun Wei Tsinghua University
Shouyi Yin
Shouyi Yin Tsinghua University
Jie Han
Jie Han University of Alberta
Fabrizio Lombardi
Fabrizio Lombardi Northeastern University
Zhihua Wang
Zhihua Wang Tsinghua University
Hongying Meng
Hongying Meng Brunel University London
Sheng Zhou
Sheng Zhou Tsinghua University
Meng-Fan Chang
Meng-Fan Chang National Tsing Hua University
Yuan Xie
Yuan Xie Hong Kong University of Science and Technology
Yiyu Shi
Yiyu Shi University of Notre Dame

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