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D-Index & Metrics

Electronics and Electrical Engineering

D-Index
35
Citations
5048
World Ranking
5575
National Ranking
803

Overview

Shouyi Yin is affiliated with Tsinghua University in China and has a research portfolio spanning computer science and engineering disciplines. Their work primarily contributes to the fields of electrical and electronic engineering, artificial intelligence, hardware and architecture, computer vision and pattern recognition, and computer networks and communications.

The scientist's research interests focus on advanced memory and neural computing, ferroelectric and negative capacitance devices, parallel computing and optimization techniques, advanced neural network applications, embedded systems design techniques, interconnection networks and systems, and coding theory and cryptography.

Shouyi Yin has published extensively in recognized academic forums. Frequent publication venues include:

  • IEEE Journal of Solid-State Circuits
  • arXiv (Cornell University)
  • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • IEEE Transactions on Circuits and Systems I Regular Papers
  • 2022 IEEE International Solid-State Circuits Conference (ISSCC)

Frequent collaborators of Shouyi Yin include Shaojun Wei, Leibo Liu, Fengbin Tu, Yang Hu, and Yang Wang. This network reflects consistent partnerships contributing to various projects and publications.

Recent notable papers by Shouyi Yin include:

  • "Highly Efficient Architecture of NewHope-NIST on FPGA using Low-Complexity NTT/INTT," 2020, IACR Transactions on Cryptographic Hardware and Embedded Systems
  • "A 28nm 29.2TFLOPS/W BF16 and 36.5TOPS/W INT8 Reconfigurable Digital CIM Processor with Unified FP/INT Pipeline and Bitwise In-Memory Booth Multiplication for Cloud Deep Learning Acceleration," 2022, 2022 IEEE International Solid-State Circuits Conference (ISSCC)
  • "A Compact and High-Performance Hardware Architecture for CRYSTALS-Dilithium," 2021, IACR Transactions on Cryptographic Hardware and Embedded Systems
  • "A 28nm 27.5TOPS/W Approximate-Computing-Based Transformer Processor with Asymptotic Sparsity Speculating and Out-of-Order Computing," 2022, 2022 IEEE International Solid-State Circuits Conference (ISSCC)
  • "ReDCIM: Reconfigurable Digital Computing-In-Memory Processor With Unified FP/INT Pipeline for Cloud AI Acceleration," 2022, IEEE Journal of Solid-State Circuits

Best Publications

  • FP-BNN

    Shuang Liang;Shouyi Yin;Leibo Liu;Wayne Luk

  • A High Energy Efficient Reconfigurable Hybrid Neural Network Processor for Deep Learning Applications

    Shouyi Yin;Peng Ouyang;Shibin Tang;Fengbin Tu

  • A Survey of Coarse-Grained Reconfigurable Architecture and Design: Taxonomy, Challenges, and Applications

    Leibo Liu;Jianfeng Zhu;Zhaoshi Li;Yanan Lu

  • 24.4 Sandwich-RAM: An Energy-Efficient In-Memory BWN Architecture with Pulse-Width Modulation

    Jun Yang;Yuyao Kong;Zhen Wang;Yan Liu

  • Highly Efficient Architecture of NewHope-NIST on FPGA using Low-Complexity NTT/INTT

    Neng Zhang;Bohan Yang;Chen Chen;Shouyi Yin

  • A 1.06-to-5.09 TOPS/W reconfigurable hybrid-neural-network processor for deep learning applications

    Shouyi Yin;Peng Ouyang;Shibin Tang;Fengbin Tu

  • Traffic-aware routing in wireless networks

    YongQiang Xiong;Qian Zhang;Shouyi Yin

  • A Multilevel Cell STT-MRAM-Based Computing In-Memory Accelerator for Binary Convolutional Neural Network

    Yu Pan;Peng Ouyang;Yinglin Zhao;Wang Kang

  • A 5.1pJ/Neuron 127.3us/Inference RNN-based Speech Recognition Processor using 16 Computing-in-Memory SRAM Macros in 65nm CMOS

    Ruiqi Guo;Yonggang Liu;Shixuan Zheng;Ssu-Yen Wu

  • Polyhedral model based mapping optimization of loop nests for CGRAs

    Dajiang Liu;Shouyi Yin;Leibo Liu;Shaojun Wei

  • RANA: towards efficient neural acceleration with refresh-optimized embedded DRAM

    Fengbin Tu;Weiwei Wu;Shouyi Yin;Leibo Liu

  • A Compact and High-Performance Hardware Architecture for CRYSTALS-Dilithium

    Cankun Zhao;Neng Zhang;Hanning Wang;Bohan Yang

  • A 141 UW, 2.46 PJ/Neuron Binarized Convolutional Neural Network Based Self-Learning Speech Recognition Processor in 28NM CMOS

    Shouyi Yin;Peng Ouyang;Shixuan Zheng;Dandan Song

  • 9.2A 28nm 12.1TOPS/W Dual-Mode CNN Processor Using Effective-Weight-Based Convolution and Error-Compensation-Based Prediction

    Huiyu Mo;Wenping Zhu;Wenjing Hu;Guangbin Wang

  • An Energy-Efficient Reconfigurable Processor for Binary-and Ternary-Weight Neural Networks With Flexible Data Bit Width

    Shouyi Yin;Peng Ouyang;Jianxun Yang;Tianyi Lu

  • Evolver: A Deep Learning Processor With On-Device Quantization–Voltage–Frequency Tuning

    Fengbin Tu;Weiwei Wu;Yang Wang;Hongjiang Chen

  • An Ultra-Low Power Binarized Convolutional Neural Network-Based Speech Recognition Processor With On-Chip Self-Learning

    Shixuan Zheng;Peng Ouyang;Dandan Song;Xiudong Li

  • Data-Flow Graph Mapping Optimization for CGRA With Deep Reinforcement Learning

    Dajiang Liu;Shouyi Yin;Guojie Luo;Jiaxing Shang

  • A High Throughput Acceleration for Hybrid Neural Networks With Efficient Resource Management on FPGA

    Shouyi Yin;Shibin Tang;Xinhan Lin;Peng Ouyang

  • An Efficient Application Mapping Approach for the Co-Optimization of Reliability, Energy, and Performance in Reconfigurable NoC Architectures

    Chen Wu;Chenchen Deng;Leibo Liu;Jie Han

  • GNA: Reconfigurable and Efficient Architecture for Generative Network Acceleration

    Jiale Yan;Shouyi Yin;Fengbin Tu;Leibo Liu

  • Fast traffic sign recognition with a rotation invariant binary pattern based feature.

    Shouyi Yin;Peng Ouyang;Leibo Liu;Yike Guo

Frequent Co-Authors

Shaojun Wei
Shaojun Wei Tsinghua University
Jie Han
Jie Han University of Alberta
Weisheng Zhao
Weisheng Zhao Beihang University
Youguang Zhang
Youguang Zhang Beihang University
Sheng Zhou
Sheng Zhou Tsinghua University
Yuan Xie
Yuan Xie Hong Kong University of Science and Technology
Meng-Fan Chang
Meng-Fan Chang National Tsing Hua University
Wang Kang
Wang Kang Beihang University

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