Chih-Cheng Hsieh

Overview

Best Publications

• A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors

  Wei-Hao Chen;Kai-Xiang Li;Wei-Yu Lin;Kuo-Hsiang Hsu

  316
  Citations

• 24.1 A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN Based AI Edge Processors

  Cheng-Xin Xue;Wei-Hao Chen;Je-Syu Liu;Jia-Fang Li

  305
  Citations

• Focal-plane-arrays and CMOS readout techniques of infrared imaging systems

  Chih-Cheng Hsieh;Chung-Yu Wu;Far-Wen Jih;Tai-Ping Sun

  298
  Citations

• 24.5 A Twin-8T SRAM Computation-In-Memory Macro for Multiple-Bit CNN-Based Machine Learning

  Xin Si;Jia-Jing Chen;Yung-Ning Tu;Wei-Hsing Huang

  248
  Citations

• CMOS-integrated memristive non-volatile computing-in-memory for AI edge processors

  Wei-Hao Chen;Chunmeng Dou;Kai-Xiang Li;Wei-Yu Lin

  237
  Citations

• 15.4 A 22nm 2Mb ReRAM Compute-in-Memory Macro with 121-28TOPS/W for Multibit MAC Computing for Tiny AI Edge Devices

  Cheng-Xin Xue;Tsung-Yuan Huang;Je-Syu Liu;Ting-Wei Chang

  214
  Citations

• A Twin-8T SRAM Computation-in-Memory Unit-Macro for Multibit CNN-Based AI Edge Processors

  Xin Si;Rui Liu;Shimeng Yu;Ren-Shuo Liu

  190
  Citations

• 15.5 A 28nm 64Kb 6T SRAM Computing-in-Memory Macro with 8b MAC Operation for AI Edge Chips

  Xin Si;Yung-Ning Tu;Wei-Hsing Huanq;Jian-Wei Su

  182
  Citations

• 16.3 A 28nm 384kb 6T-SRAM Computation-in-Memory Macro with 8b Precision for AI Edge Chips

  Jian-Wei Su;Yen-Chi Chou;Ruhui Liu;Ta-Wei Liu

  174
  Citations

• A 22nm 4Mb 8b-Precision ReRAM Computing-in-Memory Macro with 11.91 to 195.7TOPS/W for Tiny AI Edge Devices

  Cheng-Xin Xue;Je-Min Hung;Hui-Yao Kao;Yen-Hsiang Huang

  158
  Citations

• 15.2 A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips

  Jian-Wei Su;Xin Si;Yen-Chi Chou;Ting-Wei Chang

  150
  Citations

• A CMOS-integrated compute-in-memory macro based on resistive random-access memory for AI edge devices

  Cheng-Xin Xue;Yen-Cheng Chiu;Ta-Wei Liu;Tsung-Yuan Huang

  147
  Citations

• A Local Computing Cell and 6T SRAM-Based Computing-in-Memory Macro With 8-b MAC Operation for Edge AI Chips

  Xin Si;Yung-Ning Tu;Wei-Hsing Huang;Jian-Wei Su

  122
  Citations

• A 0.3 V 10-bit 1.17 f SAR ADC With Merge and Split Switching in 90 nm CMOS

  Jin-Yi Lin;Chih-Cheng Hsieh

  120
  Citations

• A new cryogenic CMOS readout structure for infrared focal plane array

  Chih-Cheng Hsieh;Chung-Yu Wu;Tai-Ping Sun

  107
  Citations

• A 2.4-to-5.2fJ/conversion-step 10b 0.5-to-4MS/s SAR ADC with charge-average switching DAC in 90nm CMOS

  Chang-Yuan Liou;Chih-Cheng Hsieh

  102
  Citations

• Embedded 1-Mb ReRAM-Based Computing-in- Memory Macro With Multibit Input and Weight for CNN-Based AI Edge Processors

  Cheng-Xin Xue;Ting-Wei Chang;Tung-Cheng Chang;Hui-Yao Kao

  101
  Citations

• High-performance CMOS buffered gate modulation input (BGMI) readout circuits for IR FPA

  Chih-Cheng Hsieh;Chung-Yu Wu;Tai-Ping Sun;Far-Wen Jih

  93
  Citations

• A 2.02–5.16 fJ/Conversion Step 10 Bit Hybrid Coarse-Fine SAR ADC With Time-Domain Quantizer in 90 nm CMOS

  Yan-Jiun Chen;Kwuang-Han Chang;Chih-Cheng Hsieh

  90
  Citations

• A 0.5-V Real-Time Computational CMOS Image Sensor With Programmable Kernel for Feature Extraction

  Tzu-Hsiang Hsu;Yi-Ren Chen;Ren-Shuo Liu;Chung-Chuan Lo

  88
  Citations

• A Low-Power Electronic Nose Signal-Processing Chip for a Portable Artificial Olfaction System

  Kea-Tiong Tang;Shih-Wen Chiu;Meng-Fan Chang;Chih-Cheng Hsieh

  66
  Citations