World's Best Scientists 2026 revealed!

D-Index & Metrics

Computer Science

D-Index
32
Citations
4352
World Ranking
13178
National Ranking
30

Best Publications

  • EvoApproxSb: Library of approximate adders and multipliers for circuit design and benchmarking of approximation methods

    Vojtech Mrazek;Radek Hrbacek;Zdenek Vasicek;Lukas Sekanina

  • Design of power-efficient approximate multipliers for approximate artificial neural networks

    Vojtech Mrazek;Syed Shakib Sarwar;Lukas Sekanina;Zdenek Vasicek

  • Efficient recognition of speed limit signs

    J. Torresen;J.W. Bakke;L. Sekanina

  • Evolutionary Approach to Approximate Digital Circuits Design

    Zdenek Vasicek;Lukas Sekanina

  • Virtual reconfigurable circuits for real-world applications of evolvable hardware

    Lukáš Sekanina

  • Improving the Accuracy and Hardware Efficiency of Neural Networks Using Approximate Multipliers

    Mohammad Saeed Ansari;Vojtech Mrazek;Bruce F. Cockburn;Lukas Sekanina

  • ALWANN: Automatic Layer-Wise Approximation of Deep Neural Network Accelerators without Retraining

    Vojtech Mrazek;Zdenek Vasicek;Lukas Sekanina;Muhammad Abdullah Hanif

  • Novel Hardware Implementation of Adaptive Median Filters

    Z. Vasicek;L. Sekanina

  • Image Filter Design with Evolvable Hardware

    Lukás Sekanina

  • An evolvable hardware system in Xilinx Virtex II Pro FPGA

    Zdenek Vasicek;Lukas Sekanina

  • Self-Reconfigurable Evolvable Hardware System for Adaptive Image Processing

    R. Salvador;A. Otero;J. Mora;E. de la Torre

  • An Evolvable Combinational Unit for FPGAs

    Lukáš Sekanina;Štěpán Friedl

  • Towards evolvable systems based on the Xilinx Zynq platform

    Roland Dobai;Lukas Sekanina

  • Physical Demonstration of Polymorphic Self-Checking Circuits

    R. Ruzicka;L. Sekanina;R. Prokop

  • Evolutionary design of gate-level polymorphic digital circuits

    Lukáš Sekanina

  • Evolutionary Design of Arbitrarily Large Sorting Networks Using Development

    Lukáš Sekanina;Michal Bidlo

  • Formal verification of candidate solutions for post-synthesis evolutionary optimization in evolvable hardware

    Zdenek Vasicek;Lukas Sekanina

  • Libraries of Approximate Circuits: Automated Design and Application in CNN Accelerators

    Vojtech Mrazek;Lukas Sekanina;Zdenek Vasicek

  • Towards evolvable IP cores for FPGAs

    L. Sekanina

  • An evolvable image filter: experimental evaluation of a complete hardware implementation in FPGA

    Tomáš Martínek;Lukáš Sekanina

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