World's Best Scientists 2026 revealed!

D-Index & Metrics

Computer Science

D-Index
32
Citations
5973
World Ranking
12974
National Ranking
5235

Overview

Simon C. Steely is affiliated with Intel in the United States and has contributed to the field of computer science through multiple research publications. Their work spans several areas within the discipline, including hardware and architecture, information systems, and computer networks and communications.

They have focused on topics related to parallel computing and optimization techniques, cloud computing and resource management, as well as distributed and parallel computing systems. These topics are reflected in their recent scholarly contributions.

Among their recent papers is "Intelligent cache prefetchers in HPC architecture," published in 2025 in the journal Cluster Computing. This paper addresses aspects of cache prefetching within high-performance computing contexts.

  • Intelligent cache prefetchers in HPC architecture (2025), Cluster Computing

Simon C. Steely has collaborated regularly with several coauthors, including Farah Fargo, Mitchell Diamond, Olivier Franza, Paul Foose, and Jack Adiletta.

  • Farah Fargo
  • Mitchell Diamond
  • Olivier Franza
  • Paul Foose
  • Jack Adiletta

The primary publication venue for their work is Cluster Computing.

  • Cluster Computing

The scientist's work integrates a range of subfields and topics, reflecting a multidisciplinary approach within computer science focusing on enhancing computing architectures, resource management, and system communication.

Best Publications

  • Adaptive insertion policies for high performance caching

    Moinuddin K. Qureshi;Aamer Jaleel;Yale N. Patt;Simon C. Steely

  • High performance cache replacement using re-reference interval prediction (RRIP)

    Aamer Jaleel;Kevin B. Theobald;Simon C. Steely;Joel Emer

  • Adaptive insertion policies for managing shared caches

    Aamer Jaleel;William Hasenplaugh;Moinuddin Qureshi;Julien Sebot

  • SHiP: signature-based hit predictor for high performance caching

    Carole-Jean Wu;Aamer Jaleel;Will Hasenplaugh;Margaret Martonosi

  • Architecture and design of AlphaServer GS320

    Kourosh Gharachorloo;Madhu Sharma;Simon Steely;Stephen Van Doren

  • Achieving Non-Inclusive Cache Performance with Inclusive Caches: Temporal Locality Aware (TLA) Cache Management Policies

    Aamer Jaleel;Eric Borch;Malini Bhandaru;Simon C. Steely

  • Trainable apparatus for predicting instruction outcomes in pipelined processors

    Scott McFarling;Simon C. Steely;Joel Emer;Edward McLellan

  • PACMan: prefetch-aware cache management for high performance caching

    Carole-Jean Wu;Aamer Jaleel;Margaret Martonosi;Simon C. Steely

  • Technique for reducing latency of inter-reference ordering using commit signals in a multiprocessor system having shared caches

    Madhumitra Sharma;Simon C. Steely;Kourosh Gharachorloo;Stephen R. Van Doren

  • Method and apparatus for reducing latency of inter-reference ordering in a multiprocessor system

    Madhumitra Sharma;Stephen R. Van Doren;Kourosh Gharachorloo;Simon C. Steely

  • CRUISE: cache replacement and utility-aware scheduling

    Aamer Jaleel;Hashem H. Najaf-abadi;Samantika Subramaniam;Simon C. Steely

  • Mechanism for optimizing generation of commit-signals in a distributed shared-memory system

    Stephen R. Van Doren;Simon C. Steely;Kourosh Gharachorloo;Madhumitra Sharma

  • Employing multiple channels for deadlock avoidance in a cache coherency protocol

    Stephen R. VanDoren;Madhumitra Sharma;Simon C. Steely

  • Mechanism for reducing latency of memory barrier operations on a multiprocessor system

    Simon C. Steely;Madhumitra Sharma;Kourosh Gharachorloo;Stephen R. Van Doren

  • LOW OCCUPANCY PROTOCOL FOR MANAGING SIMULTANEOUS TRANSACTIONS WITH DEPENDENCY

    Steely Simon C;Sharma Madhumitra;Vandoren Stephen R

  • Method and apparatus for employing commit-signals and prefetching to maintain inter-reference ordering in a high-performance I/O processor

    Madhumitra Sharma;Chester Pawlowski;Kourosh Gharachorloo;Stephen R. Van Doren

  • Shadow commands to optimize sequencing of requests in a switch-based multi-processor system

    Stephen R. VanDoren;Simon C. Steely;Madhumitra Sharma;Hari Krishnan Nagpal

  • High performance recoverable communication method and apparatus for write-only networks

    Simon C. Steely;Glenn P. Garvey;Richard B. Gillett

  • Architecture and design of AlphaServer GS320

    Unknown

  • Multiprobe instruction cache with instruction-based probe hint generation and training whereby the cache bank or way to be accessed next is predicted

    Joel S. Emer;Simon Steely;Edward J. McLellan

  • Mechanism for selectively imposing interference order between page-table fetches and corresponding data fetches

    Simon C. Steely;Madhumitra Sharma;Stephen R. Van Doren;Kourosh Gharachorloo

Frequent Co-Authors

Aamer Jaleel
Aamer Jaleel Nvidia (United States)
Moinuddin K. Qureshi
Moinuddin K. Qureshi Georgia Institute of Technology
Yale N. Patt
Yale N. Patt The University of Texas at Austin
Margaret Martonosi
Margaret Martonosi Princeton University
Carole-Jean Wu
Carole-Jean Wu Meta Platforms, Inc.
Kourosh Gharachorloo
Kourosh Gharachorloo Google (United States)
Donald Newell
Donald Newell Intel (United States)

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