World's Best Scientists 2026 revealed!

D-Index & Metrics

Computer Science

D-Index
41
Citations
6274
World Ranking
8916
National Ranking
3796

Overview

Guy Lynn Guthrie is affiliated with IBM in the United States. Their professional focus is primarily connected to this institution, indicating involvement in industry-related research or projects within this multinational technology company.

There are no records of publications, including recent papers, that have been directly associated with Guthrie. Similarly, there is no information about frequent co-authors, book publications, or frequent publication venues connected with their academic or research output.

The available data does not list specific fields of study, subfields, or main topics of work related to Guthrie. This suggests that detailed academic research output or specialization areas have not been publicly documented or made available in the sources referenced.

There are no awards or recognitions recorded for Guthrie, and they are currently listed as living.

Best Publications

  • IBM POWER7 multicore server processor

    B. Sinharoy;R. Kalla;W. J. Starke;H. Q. Le

  • METHOD OF AND APPARATUS FOR ADDING AND REMOVING THE COMPONENTS OF A DATA PROCESSING SYSTEM WITHOUT SHUTTING DOWN THE LAST MENTIONED ONE

    Guthrie Guy L;Neal Danny M;Kelley Richard A

  • High performance symmetric multiprocessing systems via super-coherent data mechanisms

    Ravi Kumar Arimilli;Guy Lynn Guthrie;William J. Starke;Derek Edward Williams

  • Multi-level multiprocessor speculation mechanism

    Guy Lynn Guthrie;Ravi Kumar Arimilli;John Steven Dodson;Derek Edward Williams

  • Multiprocessor system in which a cache serving as a highest point of coherency is indicated by a snoop response

    Ravi Kumar Arimilli;Leo James Clark;James Stephen Fields;Guy Lynn Guthrie

  • Coherency and synchronization mechanism for i/o channel controllers in a data processing system

    Ravi K. Arimilli;John S. Dodson;Guy L. Guthrie;Jerry D. Lewis

  • Multiprocessor system supporting multiple outstanding TLBI operations per partition

    Ravi Kumar Arimilli;Guy Lynn Guthrie;Kirk Samuel Livingston

  • Transactional memory support in the IBM POWER8 processor

    Hung Q. Le;Guy L. Guthrie;Derek Williams;Maged M. Michael

  • Dynamic hardware and software performance optimizations for super-coherent SMP systems

    Ravi Kumar Arimilli;Guy Lynn Guthrie;William J. Starke;Derek Edward Williams

  • Multiprocessor system bus protocol with group addresses, responses, and priorities

    Ravi Kumar Arimilli;James Stephen Fields;Guy Lynn Guthrie;Jody Bern Joyner

  • Method and system for translating peripheral component interconnect (PCI) peer-to-peer access across multiple PCI host bridges within a computer system

    Guy Lynn Guthrie;Danny Marvin Neal;Steven Mark Thurber

  • Data processing system and method for efficient communication utilizing an Tn and Ten coherency states

    James Stephen Fields;Benjiman Lee Goodman;Guy Lynn Guthrie;William John Starke

  • Data cache scrub mechanism for large L2/L3 data cache structures

    Robert Alan Cargnoni;Guy Lynn Guthrie;Harmony Lynn Helterhoff;Kevin Franklin Reick

  • The cache and memory subsystems of the IBM POWER8 processor

    William J. Starke;Jeffrey Stuecheli;David Daly;J. S. Dodson

  • Microprocessor reservation mechanism for a hashed address system

    Ravi Kumar Arimilli;Robert Alan Cargnoni;Guy Lynn Guthrie;Derek E. Williams

  • Multi-node data processing system and communication protocol that route write data utilizing a destination ID obtained from a combined response

    Ravi Kumar Arimilli;James Stephen Fields;Guy Lynn Guthrie;Jody Bern Joyner

  • Imprecise snooping based invalidation mechanism

    Ravi Kumar Arimilli;John Steven Dodson;Guy Lynn Guthrie;Jerry Don Lewis

  • Cache coherency protocol employing a read operation including a programmable flag to indicate deallocation of an intervened cache line

    Ravi Kumar Arimilli;Lakshminarayana Baba Arimilli;John Steven Dodson;Guy Lynn Guthrie

  • Efficient instruction cache coherency maintenance mechanism for scalable multiprocessor computer system with store-through data cache

    Ravi Kumar Arimilli;John Steven Dodson;Guy Lynn Guthrie

  • Processor, data processing system and method for synchronizing access to data in shared memory

    Guy Lynn Guthrie;Sheldon B. Levenstein;William John Starke;Derek Edward Williams

Frequent Co-Authors

Derek Edward Williams
Derek Edward Williams IBM (United States)
Ravi Kumar Arimilli
Ravi Kumar Arimilli IBM (United States)
John Steven Dodson
John Steven Dodson IBM (United States)
Jerry Don Lewis
Jerry Don Lewis IBM (United States)
Danny Marvin Neal
Danny Marvin Neal IBM (United States)
Steven Mark Thurber
Steven Mark Thurber IBM (United States)
Balaram Sinharoy
Balaram Sinharoy IBM (United States)
Ramakrishnan Rajamony
Ramakrishnan Rajamony Goldman Sachs (United States)
Richard Louis Arndt
Richard Louis Arndt IBM (United States)
Maged M. Michael
Maged M. Michael Facebook (United States)

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