2020 - Fellow of the American Academy of Arts and Sciences
2018 - Edward J. McCluskey Technical Achievement Award, IEEE Computer Society For contributions to power-aware computing and energy-constrained mobile sensor networks.
2010 - IEEE Fellow For contributions to power-efficient computer architecture and systems design
2009 - ACM Fellow For contributions in power-aware computing.
Her primary scientific interests are in Embedded system, Parallel computing, Cache, Real-time computing and Cache coloring. The Embedded system study combines topics in areas such as CPU power dissipation, Software system, Chip, Low-power electronics and Clock rate. Her Parallel computing research integrates issues from Scalability, Compiler and Computer engineering.
Her biological study spans a wide range of topics, including Optimizing compiler and Data structure. Her Real-time computing study which covers Frequency scaling that intersects with Set, Power budget, Workload and Benchmark. Her Cache coloring study incorporates themes from Cache pollution, Cache algorithms and Shared memory.
Her primary areas of investigation include Parallel computing, Embedded system, Compiler, Quantum computer and Software. Her Parallel computing research is multidisciplinary, incorporating perspectives in Chip and Translation lookaside buffer. Her work carried out in the field of Embedded system brings together such families of science as Clock rate, Real-time computing and Frequency scaling.
Her Compiler research includes elements of Scalability and Theoretical computer science. In general Quantum computer, her work in Quantum error correction is often linked to Computer engineering and Computation linking many areas of study. Her work investigates the relationship between Software and topics such as Computer architecture that intersect with problems in Field-programmable gate array.
Margaret Martonosi spends much of her time researching Quantum computer, Qubit, Computer engineering, Programming language and Compiler. Her study in the fields of Quantum circuit under the domain of Qubit overlaps with other disciplines such as Coherence, Parallel computing, Job shop scheduling and Applied mathematics. While working in this field, she studies both Parallel computing and Braid.
Her research in Computer engineering intersects with topics in Scalability, Reliability, Optimizing compiler, Interface and Software portability. Her study looks at the intersection of Programming language and topics like Shared memory with Stack-based memory allocation, Memory management and Stack. In Compiler, Margaret Martonosi works on issues like Programming paradigm, which are connected to Dennard scaling, Multi-core processor and Software prototyping.
Margaret Martonosi mainly focuses on Quantum computer, Qubit, Computer engineering, Computation and Software. Many of her research projects under Quantum computer are closely connected to Benchmark, Scalability and Debugging with Benchmark, Scalability and Debugging, tying the diverse disciplines of science together. Her research on Computer engineering often connects related topics like Compiler.
Her work deals with themes such as Error detection and correction and Executable, which intersect with Compiler. Margaret Martonosi interconnects Optimizing compiler, Cache coherence, Microarchitecture and Serialization in the investigation of issues within Software. Her Microarchitecture research incorporates themes from Speculative execution, Computer hardware and Cache.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
Wattch: a framework for architectural-level power analysis and optimizations
David Brooks;Vivek Tiwari;Margaret Martonosi.
international symposium on computer architecture (2000)
Energy-efficient computing for wildlife tracking: design tradeoffs and early experiences with ZebraNet
architectural support for programming languages and operating systems (2002)
Dynamic thermal management for high-performance microprocessors
D. Brooks;M. Martonosi.
high performance computer architecture (2001)
Cache decay: exploiting generational behavior to reduce cache leakage power
Stefanos Kaxiras;Zhigang Hu;Margaret Martonosi.
international symposium on computer architecture (2001)
Hardware design experiences in ZebraNet
Pei Zhang;Christopher M. Sadler;Stephen A. Lyon;Margaret Martonosi.
international conference on embedded networked sensor systems (2004)
An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget
C. Isci;A. Buyuktosunoglu;C.-Y. Chen;P. Bose.
international symposium on microarchitecture (2006)
Runtime power monitoring in high-end processors: methodology and empirical data
Canturk Isci;Margaret Martonosi.
international symposium on microarchitecture (2003)
Techniques for Multicore Thermal Management: Classification and New Exploration
James Donald;Margaret Martonosi.
international symposium on computer architecture (2006)
Impala: a middleware system for managing autonomic, parallel sensor systems
Ting Liu;Margaret Martonosi.
acm sigplan symposium on principles and practice of parallel programming (2003)
Erasure-coding based routing for opportunistic networks
Yong Wang;Sushant Jain;Margaret Martonosi;Kevin Fall.
acm special interest group on data communication (2005)
If you think any of the details on this page are incorrect, let us know.
We appreciate your kind effort to assist us to improve this page, it would be helpful providing us with as much detail as possible in the text box below: