Alper Buyuktosunoglu focuses on Embedded system, Queue, Microarchitecture, Real-time computing and Efficient energy use. The concepts of his Embedded system study are interwoven with issues in Power management, Layer, Control unit and Power gating. The Power management study combines topics in areas such as Reliability engineering, Frequency scaling, Voltage and Firmware.
His research in Microarchitecture intersects with topics in Dynamic demand, Overhead and Adaptation. His Real-time computing study combines topics in areas such as Voltage droop and Chip. He interconnects Computer hardware and Distributed computing in the investigation of issues within Efficient energy use.
His scientific interests lie mostly in Embedded system, Chip, Power management, Computer hardware and Electronic engineering. Microarchitecture is the focus of his Embedded system research. His studies in Microarchitecture integrate themes in fields like Computer architecture and Key.
Alper Buyuktosunoglu works mostly in the field of Power management, limiting it down to topics relating to Workload and, in certain cases, Reliability engineering, as a part of the same area of interest. His biological study spans a wide range of topics, including Component and Cache. The various areas that Alper Buyuktosunoglu examines in his Electronic engineering study include Integrated circuit, Microprocessor, Three-dimensional integrated circuit, Voltage and Electrical engineering.
The scientist’s investigation covers issues in Computer hardware, Cache, Distributed computing, Reliability and Chip. His work carried out in the field of Computer hardware brings together such families of science as Multi-core processor and Component. In general Cache study, his work on Cache pollution often relates to the realm of Data security, thereby connecting several areas of interest.
His Reliability research incorporates themes from Reliability engineering, Resilience, Convergence, Voltage and Key. His studies deal with areas such as Scheduling and Efficient energy use as well as Chip. The study incorporates disciplines such as System on a chip and Embedded system in addition to Thread.
Alper Buyuktosunoglu mainly investigates Reliability engineering, Chip, Fault, Component and Speedup. His Reliability engineering research is multidisciplinary, relying on both Scalability, Built-in self-test, Power management, Critical path method and Reliability. His research integrates issues of Scheduling and Distributed computing in his study of Chip.
His Fault study integrates concerns from other disciplines, such as Event, Computer hardware, Executable and Vulnerability. His Component study incorporates themes from Block and Cache, Parallel computing. His Speedup research integrates issues from Hash function and Data compression, Lossless compression.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget
C. Isci;A. Buyuktosunoglu;C.-Y. Chen;P. Bose.
international symposium on microarchitecture (2006)
Power-aware microarchitecture: design and modeling challenges for next-generation microprocessors
D.M. Brooks;P. Bose;S.E. Schuster;H. Jacobson.
IEEE Micro (2000)
Memory hierarchy reconfiguration for energy and performance in general-purpose processor architectures
Rajeev Balasubramonian;David Albonesi;Alper Buyuktosunoglu;Sandhya Dwarkadas.
international symposium on microarchitecture (2000)
Microarchitectural techniques for power gating of execution units
Zhigang Hu;Alper Buyuktosunoglu;Viji Srinivasan;Victor Zyuban.
international symposium on low power electronics and design (2004)
NDC: Analyzing the impact of 3D-stacked memory+logic devices on MapReduce workloads
Seth H. Pugsley;Jeffrey Jestes;Huihui Zhang;Rajeev Balasubramonian.
international symposium on performance analysis of systems and software (2014)
Dynamically tuning processor resources with adaptive processing
D.H. Albonesi;R. Balasubramonian;S.G. Dropsbo;S. Dwarkadas.
IEEE Computer (2003)
Integrating adaptive on-chip storage structures for reduced dynamic power
S. Dropsho;A. Buyuktosunoglu;R. Balasubramonian;D.H. Albonesi.
international conference on parallel architectures and compilation techniques (2002)
An Adaptive Issue Queue for Reduced Power at High Performance
Alper Buyuktosunoglu;Stanley Schuster;David Brooks;Pradip Bose.
PACS '00 Proceedings of the First International Workshop on Power-Aware Computer Systems-Revised Papers (2000)
Introducing the Adaptive Energy Management Features of the Power7 Chip
M Floyd;M Allen-Ware;K Rajamani;B Brock.
IEEE Micro (2011)
Dynamic power gating with quality guarantees
Anita Lungu;Pradip Bose;Alper Buyuktosunoglu;Daniel J. Sorin.
international symposium on low power electronics and design (2009)
Profile was last updated on December 6th, 2021.
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