World's Best Scientists 2026 revealed!

D-Index & Metrics

Computer Science

D-Index
55
Citations
13842
World Ranking
4270
National Ranking
2012

Research.com Recognitions

  • 2018 - ACM Fellow For contributions to shared memory and reconfigurability
  • 2017 - IEEE Fellow For contributions to shared memory and reconfigurability

Overview

Sandhya Dwarkadas is affiliated with the University of Rochester in the United States. Their research primarily falls within the field of Computer Science, with a specialized focus on subfields such as Artificial Intelligence, Computer Networks and Communications, Hardware and Architecture, Information Systems, and Signal Processing.

The key topics covered in their work include Security and Verification in Computing, Cloud Computing and Resource Management, Advanced Data Storage Technologies, Parallel Computing and Optimization Techniques, Cryptographic Implementations and Security, Distributed and Parallel Computing Systems, and IoT and Edge/Fog Computing.

Recent papers authored by or involving Dwarkadas span from 2022 to 2024 and include:

  • "MAPPER: Managing Application Performance via Parallel Efficiency Regulation," 2022, ACM Transactions on Architecture and Code Optimization
  • "The Impact of Page Size and Microarchitecture on Instruction Address Translation Overhead," 2023, ACM Transactions on Architecture and Code Optimization
  • "Interference and Need Aware Workload Colocation in Hyperscale Datacenters," 2022, arXiv (Cornell University)
  • "Preventing Coherence State Side Channel Leaks Using TimeCache," 2022, IEEE Transactions on Computers
  • "RollingCache: Using Runtime Behavior to Defend Against Cache Side Channel Attacks," 2024, arXiv (Cornell University)

Frequently publishing in venues such as ACM Transactions on Architecture and Code Optimization, arXiv (Cornell University), and IEEE Transactions on Computers, Dwarkadas has established a presence in both peer-reviewed journals and preprint archives.

Their frequent collaborators include Sayak Chakraborti, Divya Ojha, Sharanyan Srikanthan, Princeton Ferro, and Yufeng Zhou.

Recognized by professional societies, Dwarkadas has received distinctions including being named an ACM Fellow in 2018 and an IEEE Fellow in 2017. Both honors cited their contributions to shared memory and reconfigurability.

Best Publications

  • TreadMarks: shared memory computing on networks of workstations

    C. Amza;A.L. Cox;S. Dwarkadas;P. Keleher

  • Parallel Metropolis coupled Markov chain Monte Carlo for Bayesian phylogenetic inference

    Gautam Altekar;Sandhya Dwarkadas;John P. Huelsenbeck;Fredrik Ronquist

  • TreadMarks: distributed shared memory on standard workstations and operating systems

    Pete Keleher;Alan L. Cox;Sandhya Dwarkadas;Willy Zwaenepoel

  • Peer-to-peer information retrieval using self-organizing semantic overlay networks

    Chunqiang Tang;Zhichen Xu;Sandhya Dwarkadas

  • Memory hierarchy reconfiguration for energy and performance in general-purpose processor architectures

    Rajeev Balasubramonian;David Albonesi;Alper Buyuktosunoglu;Sandhya Dwarkadas

  • Energy-efficient processor design using multiple clock domains with dynamic voltage and frequency scaling

    G. Semeraro;G. Magklis;R. Balasubramonian;D.H. Albonesi

  • Towards practical page coloring-based multicore cache management

    Xiao Zhang;Sandhya Dwarkadas;Kai Shen

  • Incremental and interactive sequence mining

    S. Parthasarathy;M. J. Zaki;M. Ogihara;S. Dwarkadas

  • Reducing the complexity of the register file in dynamic superscalar processors

    Rajeev Balasubramonian;Sandhya Dwarkadas;David H. Albonesi

  • Characterizing and predicting program behavior and its variability

    Evelyn Duesterwald;Calin Cascaval;Sandhya Dwarkadas

  • Hybrid global-local indexing for effcient peer-to-peer information retrieval

    Chunqiang Tang;Sandhya Dwarkadas

  • Cashmere-2L: software coherent shared memory on a clustered remote-write network

    Robert Stets;Sandhya Dwarkadas;Nikolaos Hardavellas;Galen Hunt

  • Dynamic frequency and voltage control for a multiple clock domain microarchitecture

    Greg Semeraro;David H. Albonesi;Steven G. Dropsho;Grigorios Magklis

  • Flexible Decoupled Transactional Memory Support

    Arrvindh Shriraman;Sandhya Dwarkadas;Michael L. Scott

  • Dynamically tuning processor resources with adaptive processing

    D.H. Albonesi;R. Balasubramonian;S.G. Dropsbo;S. Dwarkadas

  • Multiple clock domain microprocessor

    David Albonesi;Greg Semeraro;Grigorios Magklis;Michael L. Scott

  • Dynamically managing the communication-parallelism trade-off in future clustered processors

    Rajeev Balasubramonian;Sandhya Dwarkadas;David H. Albonesi

  • An integrated compile-time/run-time software distributed shared memory system

    Sandhya Dwarkadas;Alan L. Cox;Willy Zwaenepoel

  • Integrating adaptive on-chip storage structures for reduced dynamic power

    S. Dropsho;A. Buyuktosunoglu;R. Balasubramonian;D.H. Albonesi

  • Message Passing Versus Distributed Shared Memory on Networks of Workstations

    Honghui Lu;Sandhya Dwarkadas;Alan L. Cox;Willy Zwaenepoel

  • Parallel Metropolis-Coupled Markov Chain Monte Carlo for Bayesian

    G. Altekar;S. Dwarkadas;J. P. Huelsenbeck;F. Ronquist

Frequent Co-Authors

Michael L. Scott
Michael L. Scott University of Rochester
David H. Albonesi
David H. Albonesi Cornell University
Alan L. Cox
Alan L. Cox Rice University
Rajeev Balasubramonian
Rajeev Balasubramonian University of Utah
Willy Zwaenepoel
Willy Zwaenepoel University of Sydney
Srinivasan Parthasarathy
Srinivasan Parthasarathy The Ohio State University
Kai Shen
Kai Shen University of Rochester
Chunqiang Tang
Chunqiang Tang Facebook (United States)
Galen C. Hunt
Galen C. Hunt Microsoft (United States)
Alper Buyuktosunoglu
Alper Buyuktosunoglu IBM (United States)

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