2026 Stefanos Kaxiras: Computer Science Researcher – H-Index, Publications & Awards

Discipline name	D-Index	World Ranking	Current World Ranking	National Ranking	Current National Ranking	Publications	Citations
Computer Science	31	13508	13098	104	102	192	5193

Research.com Recognitions

2021 - IEEE Fellow For contributions to high-performance and power-efficient memory hierarchies
2009 - ACM Distinguished Member

Overview

Stefanos Kaxiras is affiliated with Uppsala University in Sweden and focuses primarily on research within the field of Computer Science. Their research spans several subfields, including Artificial Intelligence, Hardware and Architecture, Computer Networks and Communications, Electrical and Electronic Engineering, and Signal Processing.

The scientist's research topics cover a range of areas, with particular emphasis on Security and Verification in Computing, Parallel Computing and Optimization Techniques, and Advanced Data Storage Technologies. Other areas of work include Advanced Malware Detection Techniques, Diamond and Carbon-based Materials Research, Advanced Memory and Neural Computing, and Distributed Systems and Fault Tolerance.

Stefanos Kaxiras has contributed to a variety of publications in several venues. These include:

arXiv (Cornell University)
ACM Transactions on Architecture and Code Optimization
IEEE Transactions on Computers
IEEE Computer Architecture Letters
Journal of Parallel and Distributed Computing

Notable recent papers authored or coauthored by Kaxiras include:

Understanding Selective Delay as a Method for Efficient Secure Speculative Execution, 2020, IEEE Transactions on Computers
Reorder Buffer Contention: A Forward Speculative Interference Attack for Speculation Invariant Instructions, 2021, IEEE Computer Architecture Letters
Early Address Prediction, 2021, ACM Transactions on Architecture and Code Optimization
Delay-on-Squash: Stopping Microarchitectural Replay Attacks in Their Tracks, 2022, ACM Transactions on Architecture and Code Optimization
Speculative inter-thread store-to-load forwarding in SMT architectures, 2022, Journal of Parallel and Distributed Computing

Frequent coauthors include Christos Sakalis, Magnus Själander, Alberto Ros, Pavlos Aimoniotis, and Alexandra Jimborean.

Throughout their career, Stefanos Kaxiras has been recognized with awards such as the IEEE Fellow in 2021 for contributions to high-performance and power-efficient memory hierarchies, and the ACM Distinguished Member in 2009.

Best Publications

Cache decay: exploiting generational behavior to reduce cache leakage power

Stefanos Kaxiras;Zhigang Hu;Margaret Martonosi

1009
Citations
Computer Architecture Techniques for Power-Efficiency

Stefanos Kaxiras;Margaret Martonosi

316
Citations
Cache decay: exploiting generational behavior to reduce cache leakage power

Unknown

298
Citations
Timekeeping in the memory system: predicting and optimizing memory behavior

Zhigang Hu;Stefanos Kaxiras;Margaret Martonosi

211
Citations
Cache replacement based on reuse-distance prediction

G. Keramidas;P. Petoumenos;S. Kaxiras

192
Citations
Green governors: A framework for Continuously Adaptive DVFS

Vasileios Spiliopoulos;Stefanos Kaxiras;Georgios Keramidas

179
Citations
Complexity-effective multicore coherence

Alberto Ros;Stefanos Kaxiras

154
Citations
Improving CC-NUMA performance using Instruction-based Prediction

S. Kaxiras;J.R. Goodman

137
Citations
Interval-based models for run-time DVFS orchestration in superscalar processors

Georgios Keramidas;Vasileios Spiliopoulos;Stefanos Kaxiras

130
Citations
TCP: tag correlating prefetchers

Z. Hu;M. Martonosi;S. Kaxiras

130
Citations
Splash-3: A properly synchronized benchmark suite for contemporary research

Christos Sakalis;Carl Leonardsson;Stefanos Kaxiras;Alberto Ros

121
Citations
Efficient invisible speculative execution through selective delay and value prediction

Christos Sakalis;Stefanos Kaxiras;Alberto Ros;Alexandra Jimborean

106
Citations
System and method for simplifying cache coherence using multiple write policies

Stefanos Kaxiras;Alberto Ros

93
Citations
SARC Coherence: Scaling Directory Cache Coherence in Performance and Power

S Kaxiras;G Keramidas

90
Citations
Coherence communication prediction in shared-memory multiprocessors

S. Kaxiras;C. Young

88
Citations
Method and device for identifying separable packet in multi-thread vliw processor

Alan David Berenbaum;Nevin Heintze;Tor E Jeremiassen;Stefanos Kaxiras

82
Citations
A new perspective for efficient virtual-cache coherence

Stefanos Kaxiras;Alberto Ros

78
Citations
Let caches decay: reducing leakage energy via exploitation of cache generational behavior

Zhigang Hu;Stefanos Kaxiras;Margaret Martonosi

77
Citations
Comparing power consumption of an SMT and a CMP DSP for mobile phone workloads

Stefanos Kaxiras;Girija Narlikar;Alan D. Berenbaum;Zhigang Hu

74
Citations
Computer Architecture Techniques for Power-Efficiency

Unknown

71
Citations
DataScalar architectures

Doug Burger;Stefanos Kaxiras;James R. Goodman

66
Citations
Multiple processor, distributed memory computer with out-of-order processing

Douglas C. Burger;Stefanos Kaxiras;James R. Goodman

64
Citations
Introducing DVFS-Management in a Full-System Simulator

Vasileios Spiliopoulos;Akash Bagdia;Andreas Hansson;Peter Aldworth

64
Citations

Frequent Co-Authors

Erik Hagersten Uppsala University

Margaret Martonosi Princeton University

Kevin Skadron University of Virginia

Douglas W. Clark Princeton University

André Seznec French Institute for Research in Computer Science and Automation - INRIA

Doug Burger Microsoft (United States)

Per Stenström Chalmers University of Technology

Parosh Aziz Abdulla Uppsala University

Alex Ramirez Google (United States)

Luigi Carro Federal University of Rio Grande do Sul

External Links

Personal website of Stefanos Kaxiras Google Scholar page

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