Erik Hagersten focuses on Multiprocessing, Parallel computing, Cache, Computer network and Operating system. His Multiprocessing study combines topics from a wide range of disciplines, such as Process, Computer hardware, Database transaction, Real-time computing and Software. His Parallel computing research is multidisciplinary, incorporating elements of Data structure and Memory management.
His work on Cache algorithms and Smart Cache as part of general Cache research is frequently linked to Locality, thereby connecting diverse disciplines of science. The Cache algorithms study which covers Cache coloring that intersects with Cache invalidation, Cache pollution and Page cache. The various areas that Erik Hagersten examines in his Computer network study include Address bus, Flat memory model and Physical address.
His scientific interests lie mostly in Cache, Computer network, Parallel computing, Multiprocessing and Operating system. As a part of the same scientific family, Erik Hagersten mostly works in the field of Cache, focusing on Computer hardware and, on occasion, Protocol. His Computer network study combines topics in areas such as Database transaction, Real-time computing, Embedded system and Physical address.
His Parallel computing research integrates issues from Computer architecture and Distributed shared memory. His research in Multiprocessing intersects with topics in Process, State, Instruction prefetch, System interface and Software. He works mostly in the field of Cache algorithms, limiting it down to topics relating to Cache coloring and, in certain cases, Page cache, as a part of the same area of interest.
Erik Hagersten mainly focuses on Cache, Parallel computing, Cache algorithms, Cache pollution and Cache invalidation. His Cache study is concerned with the field of Operating system as a whole. His Parallel computing study integrates concerns from other disciplines, such as Computer architecture and Software.
His research in Cache algorithms focuses on subjects like Cache coloring, which are connected to Page cache. His Cache invalidation study is concerned with the larger field of Computer network. His research on Computer network often connects related areas such as Computer hardware.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
DDM-a cache-only memory architecture
E. Hagersten;A. Landin;S. Haridi.
IEEE Computer (1992)
DDM-a cache-only memory architecture
Erik Hagersten;Anders Landin;Seif Haridi.
IEEE Computer (1992)
Multiprocessing computer system employing a cluster communication error reporting mechanism
Erik E. Hagersten;Christopher J. Jackson;Aleksandr Guzovskiy;William A. Nesheim.
(1998)
StatCache: a probabilistic approach to efficient and accurate data locality analysis
E. Berg;E. Hagersten.
international symposium on performance analysis of systems and software (2004)
THROOM — Supporting POSIX Multithreaded Binaries on a Cluster
Henrik Löf;Zoran Radović;Erik Hagersten.
european conference on parallel processing (2003)
Queue locks on cache coherent multiprocessors
P. Magnusson;A. Landin;E. Hagersten.
international parallel processing symposium (1994)
Hybrid numa coma caching system and methods for selecting between the caching modes
Erik Hagersten;Robert C. Zak.
(1996)
WildFire: a scalable path for SMPs
E. Hagersten;M. Koster.
high-performance computer architecture (1999)
StatStack: Efficient modeling of LRU caches
David Eklov;Erik Hagersten.
international symposium on performance analysis of systems and software (2010)
Multiprocessing system configured to perform efficient write operations
Erik E. Hagersten.
(1996)
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