Alex Ramirez mostly deals with Embedded system, Operating system, Parallel computing, Quality of service and Multi-core processor. Much of his study explores Embedded system relationship to Supercomputer. His studies deal with areas such as Scalability and x86 as well as Supercomputer.
The various areas that Alex Ramirez examines in his Parallel computing study include Scheduling, Data structure and Programming paradigm. His research investigates the connection with Scheduling and areas like Computer multitasking which intersect with concerns in Workload. His biological study spans a wide range of topics, including Engineering management, Cluster and Mobile technology.
Alex Ramirez mainly investigates Parallel computing, Scalability, Embedded system, Multi-core processor and Thread. His study on Speedup, Superscalar and Cache is often connected to Fetch as part of broader study in Parallel computing. His research in Embedded system intersects with topics in Quality of service and Supercomputer.
His Multi-core processor study integrates concerns from other disciplines, such as Multiprocessing and Set. His Thread research incorporates themes from Distributed computing, Concurrency and Shared memory. His research integrates issues of Resource allocation, Workload, Shared resource, Instruction set and Scheduling in his study of Multithreading.
Parallel computing, Embedded system, Multi-core processor, Supercomputer and Scalability are his primary areas of study. The Speedup research Alex Ramirez does as part of his general Parallel computing study is frequently linked to other disciplines of science, such as Execution time, therefore creating a link between diverse domains of science. He conducted interdisciplinary study in his works that combined Embedded system and Mobile processor.
His Multi-core processor research is multidisciplinary, relying on both Front and back ends, Thread, Set and Integer. Alex Ramirez has included themes like Superscalar and Cache coherence in his Thread study. His Supercomputer study combines topics from a wide range of disciplines, such as Floating point, Program optimization, Conventional memory, Registered memory and Benchmark.
His primary scientific interests are in Embedded system, Supercomputer, Mobile processor, Scalability and Parallel computing. His Embedded system research is multidisciplinary, incorporating perspectives in Mobile technology, TOP500 and Server, Operating system. His Supercomputer research includes elements of ARM architecture and Distributed computing.
His Mobile processor research encompasses a variety of disciplines, including Exascale computing, Power Architecture, Mobile device, Cluster and Multi-core processor. The concepts of his Scalability study are interwoven with issues in Domain, HPC Challenge Benchmark, Network interface and Mobile computing. His study in the field of CUDA also crosses realms of Linear system.
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Dynamically Controlled Resource Allocation in SMT Processors
Francisco J. Cazorla;Alex Ramirez;Mateo Valero;Enrique Fernandez.
international symposium on microarchitecture (2004)
Enabling preemptive multiprogramming on GPUs
Ivan Tanasic;Isaac Gelado;Javier Cabezas;Alex Ramirez.
international symposium on computer architecture (2014)
Supercomputing with commodity CPUs: are mobile SoCs ready for HPC?
Nikola Rajovic;Paul M. Carpenter;Isaac Gelado;Nikola Puzovic.
ieee international conference on high performance computing data and analytics (2013)
Tibidabo: Making the case for an ARM-based HPC system
Nikola Rajovic;Nikola Rajovic;Alejandro Rico;Alejandro Rico;Nikola Puzovic;Chris Adeniyi-Jones.
Future Generation Computer Systems (2014)
Task Superscalar: An Out-of-Order Task Pipeline
Yoav Etsion;Felipe Cabarcas;Alejandro Rico;Alex Ramirez.
international symposium on microarchitecture (2010)
Multicore Resource Management
K.J. Nesbit;M. Moreto;F.J. Cazorla;A. Ramirez.
IEEE Micro (2008)
Parallel Scalability of Video Decoders
Cor Meenderinck;Arnaldo Azevedo;Ben Juurlink;Mauricio Alvarez Mesa.
signal processing systems (2009)
DiDi: Mitigating the Performance Impact of TLB Shootdowns Using a Shared TLB Directory
Carlos Villavieja;Vasileios Karakostas;Lluis Vilanova;Yoav Etsion.
international conference on parallel architectures and compilation techniques (2011)
Predictable performance in SMT processors: synergy between the OS and SMTs
F.J. Cazorla;P.M.W. Knijnenburg;R. Sakellariou;E. Fernandez.
IEEE Transactions on Computers (2006)
The low power architecture approach towards exascale computing
Nikola Rajovic;Nikola Rajovic;Lluis Vilanova;Lluis Vilanova;Carlos Villavieja;Carlos Villavieja;Nikola Puzovic.
Journal of Computational Science (2013)
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