World's Best Scientists 2026 revealed!
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Engineering and Technology
USA
2025

D-Index & Metrics

Computer Science

D-Index
77
Citations
34890
World Ranking
1237
National Ranking
654

Research.com Recognitions

  • 2025 - Research.com Engineering and Technology in United States Leader Award
  • 2014 - ACM Fellow For contributions to efficient and capable SAT solvers, and accurate embedded software models.

Overview

Sharad Malik is affiliated with Princeton University in the United States and has contributed extensively to the field of computer science. Their research spans across several specialized areas including hardware and architecture, computational theory and mathematics, artificial intelligence, electrical and electronic engineering, and software.

The main topics of Sharad Malik's work include formal methods in verification, embedded systems design techniques, security and verification in computing, radiation effects in electronics, parallel computing and optimization techniques, physical unclonable functions (PUFs) and hardware security, and software testing and debugging techniques.

Sharad Malik has a significant number of publications distributed among various well-known venues. Frequent publication venues include:

  • arXiv (Cornell University)
  • ACM Transactions on Design Automation of Electronic Systems
  • Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design
  • 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD)
  • 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE)

Recent papers authored or co-authored by Sharad Malik feature research on architecture-level abstractions, simulation models, and optimization of convolutional neural networks. Selected papers include:

  • Generating Architecture-Level Abstractions from RTL Designs for Processors and Accelerators Part I: Determining Architectural State Variables, 2021, 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD)
  • Automatic Generation of Architecture-Level Models from RTL Designs for Processors and Accelerators, 2022, 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE)
  • Generalizing Tandem Simulation: Connecting High-level and RTL Simulation Models, 2022, 2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC)
  • CNNFlow: Memory-driven Data Flow Optimization for Convolutional Neural Networks, 2022, ACM Transactions on Design Automation of Electronic Systems
  • Application-level Validation of Accelerator Designs Using a Formal Software/Hardware Interface, 2023, ACM Transactions on Design Automation of Electronic Systems

The scientist has collaborated frequently with researchers including Aarti Gupta, Yue Xing, Hongce Zhang, Bo-Yuan Huang, and Yi Li.

Sharad Malik received recognition through the ACM Fellow award in 2014 for contributions to efficient and capable SAT solvers and accurate embedded software models.

Best Publications

  • Chaff: engineering an efficient SAT solver

    Matthew W. Moskewicz;Conor F. Madigan;Ying Zhao;Lintao Zhang

  • Particle-flow reconstruction and global event description with the CMS detector

    A. M. Sirunyan;A. Tumasyan;W. Adam;E. Asilar

  • Power analysis of embedded software: a first step towards software power minimization

    Vivek Tiwari;Sharad Malik;Andrew Wolfe

  • Power analysis of embedded software: a first step towards software power minimization

    V. Tiwari;S. Malik;A. Wolfe

  • Performance analysis of embedded software using implicit path enumeration

    Y.-T.S. Li;S. Malik

  • Identification of heavy-flavour jets with the CMS detector in pp collisions at 13 TeV

    A. M. Sirunyan;A. Tumasyan;W. Adam;F. Ambrogi

  • Orion: a power-performance simulator for interconnection networks

    Hang-Sheng Wang;Xinping Zhu;Li-Shiuan Peh;Sharad Malik

  • Instruction level power analysis and optimization of software

    V. Tiwari;S. Malik;A. Wolfe;M.T.-C. Lee

  • Determination of jet energy calibration and transverse momentum resolution in CMS

    S. Chatrchyan;V. Khachatryan;A. M. Sirunyan;A. Tumasyan

  • Search for massive resonances decaying into pairs of boosted bosons in semi-leptonic final states at s = 8 TeV

    V. Khachatryan;A. M. Sirunyan;A. Tumasyan;W. Adam

  • Evaluating the security of logic encryption algorithms

    Pramod Subramanyan;Sayak Ray;Sharad Malik

  • Instruction level power analysis and optimization of software

    Vivek Tiwari;Sharad Malik;Andrew Wolfe;Mike Tien-Chien Lee

  • Performance analysis of embedded software using implicit path enumeration

    Yau-Tsun Steven Li;Sharad Malik

  • Logic verification using binary decision diagrams in a logic synthesis environment

    S. Malik;A.R. Wang;R.K. Brayton;A. Sangiovanni-Vincentelli

  • Performance Analysis of Embedded Software Using Implicit Path Enumeration

    Yau-Tsun Steven Li;Sharad Malik

  • Addressing the system-on-a-chip interconnect woes through communication-based design

    M. Sgroi;M. Sheets;A. Mihal;K. Keutzer

  • Power-driven design of router microarchitectures in on-chip networks

    Hangsheng Wang;Li-Shiuan Peh;Sharad Malik

  • The quest for efficient Boolean Satisfiability solvers

    Lintao Zhang;Sharad Malik

  • Conflict-Driven clause learning SAT solvers

    Joao Marques-Silva;Ines Lynce;Sharad Malik

  • The Quest for Efficient Boolean Satisfiability Solvers

    Lintao Zhang;Sharad Malik

  • A Survey of Optimization Techniques Targeting Low Power VLSI Circuits

    Srinivas Devadas;Sharad Malik

  • Performance estimation of embedded software with instruction cache modeling

    Yau-Tsun Steven Li;Sharad Malik;Andrew Wolfe

  • Algorithms for discrete function manipulation

    A. Srinivasan;T. Ham;S. Malik;R.K. Brayton

  • Guarded evaluation: pushing power management to logic synthesis/design

    V. Tiwari;S. Malik;P. Ashar

  • Validating SAT Solvers Using an Independent Resolution-Based Checker: Practical Implementations and Other Applications

    Lintao Zhang;Sharad Malik

  • Power analysis and minimization techniques for embedded DSP software

    Mike Tien-Chien Lee;V. Tiwari;S. Malik;M. Fujita

  • Measurement of the Underlying Event Activity at the LHC with $s= 7$ TeV and Comparison with $s = 0.9$ TeV

    S. Chatrchyan;V. Khachatryan;A. M. Sirunyan;A. Tumasyan

  • Cha : Engineering an e cient SAT solver

    Matthew W. Moskewicz;Conor F. Madigan;Ying Zhao;Lintao Zhang

Frequent Co-Authors

Margaret Martonosi
Margaret Martonosi Princeton University
Alberto Sangiovanni-Vincentelli
Alberto Sangiovanni-Vincentelli University of California, Berkeley
Li-Shiuan Peh
Li-Shiuan Peh National University of Singapore
Wayne Wolf
Wayne Wolf University of Nebraska–Lincoln
Todd Austin
Todd Austin University of Michigan–Ann Arbor
Larry Pileggi
Larry Pileggi Carnegie Mellon University
Valeria Bertacco
Valeria Bertacco University of Michigan–Ann Arbor
Anand Raghunathan
Anand Raghunathan Purdue University West Lafayette
Jan M. Rabaey
Jan M. Rabaey University of California, Berkeley

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