2017 - Fellow of the American Academy of Arts and Sciences
2010 - Member of Academia Europaea
1994 - IEEE Fellow For contribution to synthesis algorithms for the design of electronic circuits and systems.
G. De Micheli mainly investigates Embedded system, System on a chip, Energy consumption, Integrated circuit design and Electronic engineering. In the field of Embedded system, his study on Network on a chip overlaps with subjects such as Design methods. His studies in System on a chip integrate themes in fields like Field-programmable gate array, Network topology and Computer architecture, SystemC.
His Energy consumption research includes elements of CPU cache, Reduction and Energy management. In Integrated circuit design, he works on issues like Low-power electronics, which are connected to Control reconfiguration and Reliability engineering. His work on Very-large-scale integration as part of general Electronic engineering study is frequently connected to Trade offs, therefore bridging the gap between diverse disciplines of science and establishing a new relationship between them.
His main research concerns Embedded system, Electronic engineering, System on a chip, Logic synthesis and High-level synthesis. His Embedded system research is multidisciplinary, relying on both Energy consumption, Software and Computer architecture. The concepts of his System on a chip study are interwoven with issues in Multiprocessing and SystemC.
His Logic synthesis study combines topics in areas such as Electronic circuit and Integrated circuit. His High-level synthesis research includes elements of Scheduling, Theoretical computer science and Hardware description language. His work focuses on many connections between Integrated circuit design and other disciplines, such as Low-power electronics, that overlap with his field of interest in Power management.
His primary areas of investigation include Biosensor, Embedded system, Electronic engineering, Nanotechnology and Field-programmable gate array. His Embedded system study frequently links to adjacent areas such as Power management. G. De Micheli interconnects Bottleneck, Iterative reconstruction and Medical imaging in the investigation of issues within Field-programmable gate array.
His Integrated circuit design study which covers CMOS that intersects with Low-power electronics, Electronic circuit and Voltage. His System on a chip study combines topics from a wide range of disciplines, such as Multiprocessing, Timing closure and Quality of service. His work deals with themes such as Computer architecture and Interconnection, which intersect with Network on a chip.
Embedded system, Integrated circuit design, Network on a chip, System on a chip and CMOS are his primary areas of study. His study connects Power management and Embedded system. His work carried out in the field of Integrated circuit design brings together such families of science as Redundancy and Electronics.
His Network on a chip research is multidisciplinary, relying on both Logic synthesis, Computer architecture, Interconnection and Scalability. His System on a chip study incorporates themes from Multiprocessing, Timing closure, Quality of service and Integrated circuit. His CMOS research includes themes of Salicide, Integrated injection logic, Very-large-scale integration and Transistor scaling.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
Networks on chips: a new SoC paradigm
L. Benini;G. De Micheli.
IEEE Computer (2002)
A survey of design techniques for system-level dynamic power management
L. Benini;A. Bogliolo;G. De Micheli.
IEEE Transactions on Very Large Scale Integration Systems (2000)
Bandwidth-constrained mapping of cores onto NoC architectures
S. Murali;G. De Micheli.
design, automation, and test in europe (2004)
Hardware-software cosynthesis for digital systems
R.K. Gupta;G. De Micheli.
IEEE Design & Test of Computers (1993)
NoC synthesis flow for customized domain specific multiprocessor systems-on-chip
D. Bertozzi;A. Jalabert;Srinivasan Murali;R. Tamhankar.
IEEE Transactions on Parallel and Distributed Systems (2005)
Policy optimization for dynamic power management
L. Benini;A. Bogliolo;G.A. Paleologo;G. De Micheli.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1999)
Optimal State Assignment for Finite State Machines
G. De Micheli;R.K. Brayton;A. Sangiovanni-Vincentelli.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1985)
Asymptotic zero-transition activity encoding for address busses in low-power microprocessor-based systems
L. Benini;G. De Micheli;E. Macii;D. Sciuto.
great lakes symposium on vlsi (1997)
SUNMAP: a tool for automatic topology selection and generation for NoCs
S. Murali;G. De Micheli.
design automation conference (2004)
Analysis of error recovery schemes for networks on chips
S. Murali;T. Theocharides;N. Vijaykrishnan;M.J. Irwin.
IEEE Design & Test of Computers (2005)
Profile was last updated on December 6th, 2021.
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