World's Best Scientists 2026 revealed!
Axel Jantsch

Axel Jantsch

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Electronics and Electrical Engineering
Austria
2026

D-Index & Metrics

Computer Science

D-Index
48
Citations
11956
World Ranking
6088
National Ranking
45

Electronics and Electrical Engineering

D-Index
48
Citations
11904
World Ranking
3027
National Ranking
7

Research.com Recognitions

  • 2026 - Research.com Electronics and Electrical Engineering in Austria Leader Award

Overview

Axel Jantsch is affiliated with TU Wien in Austria and has contributed extensively to research in computer science and engineering. Their work encompasses both broad and specialized areas within these disciplines.

The scientist's main fields of study include:

  • Computer Science
  • Engineering

The subfields of study that Axel Jantsch has focused on comprise:

  • Artificial Intelligence
  • Computer Networks and Communications
  • Computer Vision and Pattern Recognition
  • Electrical and Electronic Engineering
  • Hardware and Architecture

Axel Jantsch's research touches on a variety of specialized topics, including:

  • Advanced Neural Network Applications
  • Parallel Computing and Optimization Techniques
  • Anomaly Detection Techniques and Applications
  • Advanced Software Engineering Methodologies
  • Software System Performance and Reliability
  • Adversarial Robustness in Machine Learning
  • Advanced Memory and Neural Computing

The scientist has published numerous papers with a concentration in well-regarded venues. Some frequent publication venues are:

  • IEEE Access
  • IEEE Design and Test
  • arXiv (Cornell University)
  • ACM Transactions on Cyber-Physical Systems
  • Proceedings of the IEEE

Selected recent papers by Axel Jantsch include:

  • "Self-aware Cyber-Physical Systems", 2020, ACM Transactions on Cyber-Physical Systems
  • "RoSA: A Framework for Modeling Self-Awareness in Cyber-Physical Systems", 2020, IEEE Access
  • "Embodied Self-Aware Computing Systems", 2020, Proceedings of the IEEE
  • "ANNETTE: Accurate Neural Network Execution Time Estimation With Stacked Models", 2020, IEEE Access
  • "Blackthorn: Latency Estimation Framework for CNNs on Embedded Nvidia Platforms", 2021, IEEE Access

Throughout the scientific career, Axel Jantsch has collaborated frequently with several co-authors, including:

  • Nikil Dutt
  • Nima TaheriNejad
  • Mattias O'Nils
  • Matthias Wess
  • Martin Lechner

Best Publications

  • A network on chip architecture and design methodology

    S. Kumar;A. Jantsch;J.-P. Soininen;M. Forsell

  • Networks on chip

    Axel Jantsch;Hannu Tenhunen

  • Network on Chip : An architecture for billion transistor era

    Ahmed Hemani;Axel Jantsch;Shashi Kumar;Adam Postula

  • Guaranteed bandwidth using looped containers in temporally disjoint networks within the nostrum network on chip

    Mikael Millberg;Erland Nilsson;Rikard Thid;Axel Jantsch

  • The Nostrum backbone-a communication protocol stack for Networks on Chip

    M. Millberg;E. Nilsson;R. Thid;S. Kumar

  • Methods for fault tolerance in networks-on-chip

    Martin Radetzki;Chaochao Feng;Xueqian Zhao;Axel Jantsch

  • System modeling and transformational design refinement in ForSyDe [formal system design]

    I. Sander;A. Jantsch

  • Load Distribution with the Proximity Congestion Awareness in a Network on Chip

    Erland Nilsson;Mikael Millberg;Johnny Oberg;Axel Jantsch

  • Run-time Partial Reconfiguration speed investigation and architectural design space exploration

    Ming Liu;Wolfgang Kuehn;Zhonghai Lu;Axel Jantsch

  • The Benefits of Self-Awareness and Attention in Fog and Mist Computing

    Jurgo S. Preden;Kalle Tammemae;Axel Jantsch;Mairo Leier

  • Cluster-based Simulated Annealing for Mapping Cores onto 2D Mesh Networks on Chip

    Zhonghai Lu;Lei Xia;A. Jantsch

  • A fault model notation and error-control scheme for switch-to-switch buses in a network-on-chip

    Heiko Zimmer;Axel Jantsch

  • Interconnect-Centric Design for Advanced SOC and NOC

    Jari Nurmi;H. Tenhunen;J. Isoaho;Axel Jantsch

  • An Analytical Latency Model for Networks-on-Chip

    A. E. Kiasari;Zhonghai Lu;A. Jantsch

  • Hardware/software partitioning and minimizing memory interface traffic

    Axel Jantsch;Peeter Ellervee;Ahmed Hemani;Johnny Öberg

  • Models of computation and languages for embedded system design

    Axel Jantsch;Ingo Sander

  • Addressing Transient and Permanent Faults in NoC With Efficient Fault-Tolerant Deflection Router

    Chaochao Feng;Zhonghai Lu;A. Jantsch;Minxuan Zhang

  • Fog Computing in the Internet of Things

    Amir M. Rahmani;Pasi Liljeberg;Jürgo-Sören Preden;Axel Jantsch

  • Machine Learning for Power, Energy, and Thermal Management on Multicore Processors: A Survey

    Santiago Pagani;P. D. Sai Manoj;Axel Jantsch;Jorg Henkel

  • Connection-oriented multicasting in wormhole-switched networks on chip

    Zhonghai Lu;Bei Yin;A. Jantsch

  • SPECTR: Formal Supervisory Control and Coordination for Many-core Systems Resource Management

    Amir M. Rahmani;Bryan Donyanavard;Tiago Mück;Kasra Moazzemi

Frequent Co-Authors

Hannu Tenhunen
Hannu Tenhunen Royal Institute of Technology
Pasi Liljeberg
Pasi Liljeberg University of Turku
Nikil Dutt
Nikil Dutt University of California, Irvine
Dimitrios Soudris
Dimitrios Soudris National Technical University of Athens
Muhammad Shafique
Muhammad Shafique New York University Abu Dhabi
Luca Benini
Luca Benini ETH Zurich
Petru Eles
Petru Eles Linköping University
Davide Bertozzi
Davide Bertozzi University of Ferrara
Radu Marculescu
Radu Marculescu The University of Texas at Austin

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