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D-Index & Metrics

Computer Science

D-Index
62
Citations
16366
World Ranking
2888
National Ranking
1421

Electronics and Electrical Engineering

D-Index
60
Citations
15415
World Ranking
1612
National Ranking
655

Research.com Recognitions

  • 2013 - IEEE Fellow For contributions to design and optimization of on-chip communication for embedded multicore systems

Overview

Radu Marculescu is affiliated with The University of Texas at Austin in the United States. Their research primarily focuses on computer science, with a broad range of work within subfields such as computer vision and pattern recognition, artificial intelligence, computer networks and communications, hardware and architecture, and electrical and electronic engineering.

Their investigations cover several main topics including advanced neural network applications, parallel computing and optimization techniques, misinformation and its impacts, domain adaptation and few-shot learning, IoT and edge/fog computing, brain tumor detection and classification, and distributed and parallel computing systems.

Marculescu's publication record includes papers such as:

  • Medical Image Segmentation via Cascaded Attention Decoding, 2023, 2023 IEEE/CVF Winter Conference on Applications of Computer Vision (WACV)
  • Runtime Task Scheduling Using Imitation Learning for Heterogeneous Many-Core Systems, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • Multi-scale Hierarchical Vision Transformer with Cascaded Attention Decoding for Medical Image Segmentation, 2023, arXiv (Cornell University)
  • Zero-Shot Neural Architecture Search: Challenges, Solutions, and Opportunities, 2024, IEEE Transactions on Pattern Analysis and Machine Intelligence
  • Domain-Specific Architectures: Research Problems and Promising Approaches, 2022, ACM Transactions on Embedded Computing Systems

Frequent co-authors working with Marculescu include Ümit Y. Ogras, Mustafa Munir, Guihong Li, Yigit Ege Bayiz, and Kartikeya Bhardwaj.

Common venues for Marculescu's publications are:

  • arXiv (Cornell University)
  • ACM Transactions on Embedded Computing Systems
  • IEEE Access
  • IEEE Transactions on Computers
  • IEEE Transactions on Emerging Topics in Computing

Marculescu's contributions to the field have been recognized with an IEEE Fellow award in 2013. This award acknowledged their work in the design and optimization of on-chip communication for embedded multicore systems.

Best Publications

  • Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit Perspectives

    R. Marculescu;U.Y. Ogras;Li-Shiuan Peh;N.E. Jerger

  • Energy- and performance-aware mapping for regular NoC architectures

    Jingcao Hu;R. Marculescu

  • Energy-aware mapping for tile-based NoC architectures under performance constraints

    Jingcao Hu;Radu Marculescu

  • DyAD - smart routing for networks-on-chip

    Jingcao Hu;Radu Marculescu

  • "It's a small world after all": NoC performance optimization via long-range link insertion

    U.Y. Ogras;R. Marculescu

  • Key research problems in NoC design: a holistic perspective

    Radu Marculescu;Jingcao Hu;Umit Y. Ogras

  • Electronic textiles: a platform for pervasive computing

    D. Marculescu;R. Marculescu;N.H. Zamora;P. Stanley-Marbell

  • Exploiting the Routing Flexibility for Energy/Performance Aware Mapping of Regular NoC Architectures

    Jingcao Hu;Radu Marculescu

  • Energy-aware communication and task scheduling for network-on-chip architectures under real-time constraints

    Jingcao Hu;Radu Marculescu

  • On-chip communication architecture exploration: A quantitative evaluation of point-to-point, bus, and network-on-chip approaches

    Hyung Gyu Lee;Naehyuck Chang;Umit Y. Ogras;Radu Marculescu

  • Medical Image Segmentation via Cascaded Attention Decoding

    Unknown

  • EMCAD: Efficient Multi-Scale Convolutional Attention Decoding for Medical Image Segmentation

    Unknown

  • On-chip traffic modeling and synthesis for MPEG-2 video applications

    G.V. Varatkar;R. Marculescu

  • System-Level Buffer Allocation for Application-Specific Networks-on-Chip Router Design

    Jingcao Hu;U.Y. Ogras;R. Marculescu

  • Application-specific buffer space allocation for networks-on-chip router design

    Jingcao Hu;R. Marculescu

  • Energy- and Performance-Aware Incremental Mapping for Networks on Chip With Multiple Voltage Levels

    Chen-Ling Chou;U.Y. Ogras;R. Marculescu

  • Towards on-chip fault-tolerant communication

    Tudor Dumitraş;Sam Kerner;Radu Mărculescu

  • Voltage-frequency island partitioning for GALS-based networks-on-chip

    Umit Y. Ogras;Radu Marculescu;Puru Choudhary;Diana Marculescu

  • Contention-aware application mapping for Network-on-Chip communication architectures

    Chen-Ling Chou;R. Marculescu

  • Application-specific network-on-chip architecture customization via long-range link insertion

    U. Y. Ogras;R. Marculescu

  • Switching Activity Analysis Considering Spatioternporal Correlations

    Radu Marculescu;Diana Marculescu;Massoud Pedram

  • Architecting voltage islands in core-based system-on-a-chip designs

    Jingcao Hu;Youngsoo Shin;Nagu Dhanwada;Radu Marculescu

Frequent Co-Authors

Diana Marculescu
Diana Marculescu The University of Texas at Austin
Paul Bogdan
Paul Bogdan University of Southern California
Umit Y. Ogras
Umit Y. Ogras University of Wisconsin–Madison
Massoud Pedram
Massoud Pedram University of Southern California
Partha Pratim Pande
Partha Pratim Pande Washington State University
Chi-Ying Tsui
Chi-Ying Tsui Hong Kong University of Science and Technology
Pradeep K. Khosla
Pradeep K. Khosla University of California, San Diego
Naehyuck Chang
Naehyuck Chang Korea Advanced Institute of Science and Technology
Ran Ginosar
Ran Ginosar Technion – Israel Institute of Technology
Metin Sitti
Metin Sitti Max Planck Institute for Intelligent Systems

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