2013 - IEEE Fellow For contributions to design and optimization of on-chip communication for embedded multicore systems
Radu Marculescu mostly deals with Network on a chip, System on a chip, Embedded system, Energy consumption and Distributed computing. His Network on a chip research is under the purview of Computer network. His studies in System on a chip integrate themes in fields like Traffic analysis, Integrated circuit design, Quality of service, Reduction and Data compression.
The various areas that Radu Marculescu examines in his Embedded system study include Scheduling, Processor scheduling, Schedule, Fixed-priority pre-emptive scheduling and Computation. Radu Marculescu has included themes like Multiprocessing, Logic synthesis, FPGA prototype and Implementation in his Energy consumption study. His Distributed computing research is multidisciplinary, relying on both Routing, Overhead, Deterministic routing and Branch and bound.
Radu Marculescu focuses on Network on a chip, Embedded system, Distributed computing, System on a chip and Energy consumption. As part of the same scientific family, Radu Marculescu usually focuses on Network on a chip, concentrating on Computer architecture and intersecting with Design space exploration. Radu Marculescu has researched Embedded system in several fields, including Fault tolerance, Power management, Efficient energy use and Multi-core processor.
His research integrates issues of Control theory and Frequency scaling in his study of Power management. While working in this field, Radu Marculescu studies both Energy consumption and Energy management. His research related to Network packet, Multipath routing and Link-state routing protocol might be considered part of Computer network.
Artificial intelligence, Deep learning, Distributed computing, Network science and Machine learning are his primary areas of study. His Artificial intelligence study incorporates themes from Theoretical computer science, Data mining, Metric, Energy consumption and Systems design. The study incorporates disciplines such as Design space exploration and Turing machine in addition to Distributed computing.
His Artificial neural network research integrates issues from Convolutional neural network, Telecommunications network, Host, Computational biology and Network on a chip. His Network on a chip research incorporates themes from Backpropagation, Support vector machine, Queueing theory, Real-time computing and Queue. His work deals with themes such as Embedded system and Wireline, which intersect with Reduction.
His primary scientific interests are in Embedded system, Artificial intelligence, Deep learning, Computer architecture and Wireless. He combines subjects such as Control system, Scalability, Design paradigm, Multi-core processor and Reinforcement learning with his study of Embedded system. His biological study spans a wide range of topics, including Distributed computing, Machine learning, Microbiome and Edge device.
His Computer architecture study integrates concerns from other disciplines, such as Multicore systems and Traffic analysis. His Artificial neural network research is multidisciplinary, incorporating elements of System on a chip, Computational biology, Host and Network on a chip. His System on a chip research is multidisciplinary, incorporating perspectives in Backpropagation and Wireline.
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Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit Perspectives
R. Marculescu;U.Y. Ogras;Li-Shiuan Peh;N.E. Jerger.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2009)
Energy- and performance-aware mapping for regular NoC architectures
Jingcao Hu;R. Marculescu.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2005)
Energy-aware mapping for tile-based NoC architectures under performance constraints
Jingcao Hu;Radu Marculescu.
asia and south pacific design automation conference (2003)
DyAD - smart routing for networks-on-chip
Jingcao Hu;Radu Marculescu.
design automation conference (2004)
"It's a small world after all": NoC performance optimization via long-range link insertion
U.Y. Ogras;R. Marculescu.
international conference on hardware/software codesign and system synthesis (2006)
Key research problems in NoC design: a holistic perspective
Radu Marculescu;Jingcao Hu;Umit Y. Ogras.
international conference on hardware/software codesign and system synthesis (2005)
Electronic textiles: a platform for pervasive computing
D. Marculescu;R. Marculescu;N.H. Zamora;P. Stanley-Marbell.
Proceedings of the IEEE (2003)
Exploiting the Routing Flexibility for Energy/Performance Aware Mapping of Regular NoC Architectures
Jingcao Hu;Radu Marculescu.
design, automation, and test in europe (2003)
Energy-aware communication and task scheduling for network-on-chip architectures under real-time constraints
Jingcao Hu;Radu Marculescu.
design, automation, and test in europe (2004)
On-chip communication architecture exploration: A quantitative evaluation of point-to-point, bus, and network-on-chip approaches
Hyung Gyu Lee;Naehyuck Chang;Umit Y. Ogras;Radu Marculescu.
ACM Transactions on Design Automation of Electronic Systems (2008)
Profile was last updated on December 6th, 2021.
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