D-Index & Metrics Best Publications

D-Index & Metrics D-index (Discipline H-index) only includes papers and citation values for an examined discipline in contrast to General H-index which accounts for publications across all disciplines.

Discipline name D-index D-index (Discipline H-index) only includes papers and citation values for an examined discipline in contrast to General H-index which accounts for publications across all disciplines. Citations Publications World Ranking National Ranking
Electronics and Electrical Engineering D-index 38 Citations 7,372 197 World Ranking 3067 National Ranking 1200
Computer Science D-index 38 Citations 7,399 208 World Ranking 6386 National Ranking 3069

Research.com Recognitions

Awards & Achievements

2020 - IEEE Fellow For contributions to network-on-chip architectures for manycore computing

Overview

What is he best known for?

The fields of study he is best known for:

  • Computer network
  • Artificial intelligence
  • Electrical engineering

Partha Pratim Pande spends much of his time researching Network on a chip, Embedded system, System on a chip, Interconnection and Wireless. His work carried out in the field of Network on a chip brings together such families of science as Integrated circuit design, Network topology and Integrated circuit. Partha Pratim Pande combines subjects such as Crosstalk, Latency, Multi-core processor and Packet switching with his study of Embedded system.

Within one scientific family, Partha Pratim Pande focuses on topics pertaining to Efficient energy use under Multi-core processor, and may sometimes address concerns connected to Energy conservation, Wi-Fi array and Bandwidth. His System on a chip study integrates concerns from other disciplines, such as Network architecture and Routing. He frequently studies issues relating to Computer architecture and Interconnection.

His most cited work include:

  • Performance evaluation and design trade-offs for network-on-chip interconnect architectures (802 citations)
  • Networks-on-Chip in a Three-Dimensional Environment: A Performance Evaluation (398 citations)
  • Scalable Hybrid Wireless Network-on-Chip Architectures for Multicore Systems (234 citations)

What are the main themes of his work throughout his whole career to date?

His primary scientific interests are in Embedded system, Network on a chip, Wireless, Multi-core processor and Interconnection. His work in the fields of Embedded system, such as System on a chip, intersects with other areas such as Dissipation and Scalability. His Network on a chip research incorporates elements of Integrated circuit design, Computer architecture and Very-large-scale integration.

His research integrates issues of Computer network, Latency, Data transmission and Electronic engineering in his study of Wireless. The Multi-core processor study combines topics in areas such as Frequency scaling, Hardware acceleration, Distributed computing and Robustness. The study incorporates disciplines such as Fault tolerance and Network topology in addition to Interconnection.

He most often published in these fields:

  • Embedded system (48.57%)
  • Network on a chip (33.81%)
  • Wireless (30.48%)

What were the highlights of his more recent work (between 2017-2021)?

  • Distributed computing (16.19%)
  • Key (3.81%)
  • Electronic engineering (13.81%)

In recent papers he was focusing on the following fields of study:

Partha Pratim Pande spends much of his time researching Distributed computing, Key, Electronic engineering, Design space exploration and Computer architecture. His research in Distributed computing intersects with topics in Energy consumption and Network on a chip. Many of his studies involve connections with topics such as System on a chip and Network on a chip.

The various areas that Partha Pratim Pande examines in his Electronic engineering study include Switched capacitor, Topology, Voltage regulator and Electrical efficiency. Partha Pratim Pande interconnects Airfield traffic pattern, Latency and Parallel computing in the investigation of issues within Design space exploration. His Computer architecture research is multidisciplinary, incorporating elements of Artificial neural network, Transistor and Resistive random-access memory.

Between 2017 and 2021, his most popular works were:

  • On-Chip Communication Network for Efficient Training of Deep Convolutional Networks on Heterogeneous Manycore Systems (46 citations)
  • A 40% PAE Frequency-Reconfigurable CMOS Power Amplifier With Tunable Gate–Drain Neutralization for 28-GHz 5G Radios (29 citations)
  • Learning-Based Application-Agnostic 3D NoC Design for Heterogeneous Manycore Systems (23 citations)

In his most recent research, the most cited papers focused on:

  • Computer network
  • Artificial intelligence
  • Electrical engineering

Partha Pratim Pande mostly deals with Distributed computing, Network on a chip, Computer architecture, Efficient energy use and Systems design. His studies deal with areas such as Interconnection and Design space exploration as well as Distributed computing. His Network on a chip investigation overlaps with other areas such as Space exploration and Adaptive design.

He usually deals with Computer architecture and limits it to topics linked to Convolutional neural network and System on a chip, Deep learning, Telecommunications network and Wireless sensor network. His biological study spans a wide range of topics, including Energy consumption and Embedded system. His work in the fields of Integrated circuit design overlaps with other areas such as Context.

This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.

Best Publications

Performance evaluation and design trade-offs for network-on-chip interconnect architectures

Partha Pratim Pande;C. Grecu;M. Jones;A. Ivanov.
IEEE Transactions on Computers (2005)

1116 Citations

Networks-on-Chip in a Three-Dimensional Environment: A Performance Evaluation

B.S. Feero;P.P. Pande.
IEEE Transactions on Computers (2009)

612 Citations

System-on-Chip: Reuse and Integration

R. Saleh;S. Wilton;S. Mirabbasi;A. Hu.
Proceedings of the IEEE (2006)

352 Citations

Scalable Hybrid Wireless Network-on-Chip Architectures for Multicore Systems

A. Ganguly;K. Chang;S. Deb;P. P. Pande.
IEEE Transactions on Computers (2011)

345 Citations

Wireless NoC as Interconnection Backbone for Multicore Chips: Promises and Challenges

S. Deb;A. Ganguly;P. P. Pande;B. Belzer.
IEEE Journal on Emerging and Selected Topics in Circuits and Systems (2012)

337 Citations

Design of a switch for network on chip applications

P.P. Pande;C. Grecu;A. Ivanov;R. Saleh.
international symposium on circuits and systems (2003)

285 Citations

Design, synthesis, and test of networks on chips

P.P. Pande;C. Grecu;A. Ivanov;R. Saleh.
IEEE Design & Test of Computers (2005)

244 Citations

Networks-on-chip in emerging interconnect paradigms: Advantages and challenges

Luca P. Carloni;Partha Pande;Yuan Xie.
networks on chips (2009)

233 Citations

Design of an Energy-Efficient CMOS-Compatible NoC Architecture with Millimeter-Wave Wireless Interconnects

Sujay Deb;Kevin Chang;Xinmin Yu;Suman Prasad Sah.
IEEE Transactions on Computers (2013)

218 Citations

Performance evaluation and design trade-offs for wireless network-on-chip architectures

Kevin Chang;Sujay Deb;Amlan Ganguly;Xinmin Yu.
ACM Journal on Emerging Technologies in Computing Systems (2012)

137 Citations

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