2006 - IEEE Fellow For contributions to intellectual property (IP) for system on a chip (SoC) testing.
The Canadian Academy of Engineering
Along with Embedded system, other disciplines of study including Computer architecture and System on a chip are integrated into his research. He integrates Computer architecture and Embedded system in his studies. Andre Ivanov incorporates Chromatin and Nuclear protein in his studies. His Nuclear protein study frequently links to related topics such as Nuclear lamina. His Nuclear lamina study frequently links to adjacent areas such as Biochemistry. His Biochemistry study frequently draws connections between related disciplines such as Autophagy. He undertakes interdisciplinary study in the fields of Autophagy and Lysosome through his research. He performs integrative study on Lysosome and Cytoplasm. Andre Ivanov integrates Cytoplasm and Chromatin in his studies.
His System on a chip research focuses on subjects like Embedded system, which are linked to Built-in self-test. In general Amorphous solid, his work in Crystallography is often linked to Chemical physics linking many areas of study. Andre Ivanov regularly ties together related areas like Amorphous solid in his Crystallography studies. His Condensed matter physics research includes themes of Geometry, Zigzag and Carbon nanotube, Nanotechnology. His Geometry study frequently links to other fields, such as Zigzag. Andre Ivanov connects Nanotechnology with Carbon nanotube in his study. Throughout his Quantum mechanics studies, he incorporates elements of other sciences such as Computational chemistry, Condensed matter physics, Chemical physics and Optics. Andre Ivanov applies his multidisciplinary studies on Optics and Quantum mechanics in his research. His work on Algorithm is being expanded to include thematically relevant topics such as Binary Golay code.
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Performance evaluation and design trade-offs for network-on-chip interconnect architectures
Partha Pratim Pande;C. Grecu;M. Jones;A. Ivanov.
IEEE Transactions on Computers (2005)
System-on-Chip: Reuse and Integration
R. Saleh;S. Wilton;S. Mirabbasi;A. Hu.
Proceedings of the IEEE (2006)
Design of a switch for network on chip applications
P.P. Pande;C. Grecu;A. Ivanov;R. Saleh.
international symposium on circuits and systems (2003)
Design, synthesis, and test of networks on chips
P.P. Pande;C. Grecu;A. Ivanov;R. Saleh.
IEEE Design & Test of Computers (2005)
PARALLEL AND DISTRIBUTED SYSTEMS
James D. Isaak;Sorel Reisman;Jeffrey M. Voas;Elizabeth L. Burd.
(2010)
Guest Editors' Introduction: The Network-on-Chip Paradigm in Practice and Research
A. Ivanov;G. De Micheli.
IEEE Design & Test of Computers (2005)
BIST for network-on-chip interconnect infrastructures
C. Grecu;P. Pande;A. Ivanov;R. Saleh.
vlsi test symposium (2006)
Jitter models for the design and test of Gbps-speed serial interconnects
N. Ou;T. Farahmand;A. Kuo;S. Tabatabaei.
IEEE Design & Test of Computers (2004)
On-line fault detection and location for NoC interconnects
C. Grecu;A. Ivanov;R. Saleh;E.S. Sogomonyan.
international on-line testing symposium (2006)
Time monitoring appliance
Andre Ivanov;Alan Arthur Lowe.
(1996)
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