World's Best Scientists 2026 revealed!

D-Index & Metrics

Computer Science

D-Index
49
Citations
9799
World Ranking
5878
National Ranking
2662

Electronics and Electrical Engineering

D-Index
44
Citations
8852
World Ranking
3696
National Ranking
1340

Overview

Patrick Schaumont is affiliated with Worcester Polytechnic Institute in the United States. Their research primarily falls within the domain of Computer Science, with a strong focus on several subfields including Artificial Intelligence, Hardware and Architecture, Electrical and Electronic Engineering, Signal Processing, and Information Systems.

Key topics covered in their body of work include:

  • Cryptographic Implementations and Security
  • Security and Verification in Computing
  • Physical Unclonable Functions (PUFs) and Hardware Security
  • Advanced Malware Detection Techniques
  • Chaos-based Image/Signal Encryption
  • Coding theory and cryptography
  • Wireless Body Area Networks

Their recent scholarly contributions feature a range of papers published in notable venues from 2022 onward. Examples include:

  • "Threat Modeling and Risk Analysis for Miniaturized Wireless Biomedical Devices" (2022, IEEE Internet of Things Journal)
  • "SoK" (2022, Proceedings of the 2022 ACM on Asia Conference on Computer and Communications Security)
  • "ScatterVerif: Verification of Electronic Boards Using Reflection Response of Power Distribution Network" (2022, ACM Journal on Emerging Technologies in Computing Systems)
  • "ImpedanceVerif: On-Chip Impedance Sensing for System-Level Tampering Detection" (2022, IACR Transactions on Cryptographic Hardware and Embedded Systems)
  • "Benchmarking and Configuring Security Levels in Intermittent Computing" (2022, ACM Transactions on Embedded Computing Systems)

They have published frequently in reputable venues such as arXiv (Cornell University), IACR Transactions on Cryptographic Hardware and Embedded Systems, IEEE Transactions on Emerging Topics in Computing, ACM Transactions on Embedded Computing Systems, and Computer.

Patrick Schaumont has collaborated regularly with a set of co-authors, including Pantea Kiaei, Shahin Tajik, Richa Singh, Archanaa S. Krishnan, and Yuan Yao.

Best Publications

  • A Systematic Method to Evaluate and Compare the Performance of Physical Unclonable Functions

    Abhranil Maiti;Vikash Gunreddy;Patrick Schaumont

  • A large scale characterization of RO-PUF

    Abhranil Maiti;Jeff Casarona;Luke McHale;Patrick Schaumont

  • Improved Ring Oscillator PUF: An FPGA-friendly Secure Primitive

    Abhranil Maiti;Patrick Schaumont

  • A new algorithm for elimination of common subexpressions

    R. Pasko;P. Schaumont;V. Derudder;S. Vernalde

  • Improving the quality of a Physical Unclonable Function using configurable Ring Oscillators

    Abhranil Maiti;Patrick Schaumont

  • Design and performance testing of a 2.29-GB/s Rijndael processor

    I. Verbauwhede;P. Schaumont;H. Kuo

  • A quick safari through the reconfiguration jungle

    Patrick Schaumont;Ingrid Verbauwhede;Kurt Keutzer;Majid Sarrafzadeh

  • AES-Based Security Coprocessor IC in 0.18- $muhbox m$ CMOS With Resistance to Differential Power Analysis Side-Channel Attacks

    D.D. Hwang;K. Tiri;A. Hodjat;B.-C. Lai

  • Prototype IC with WDDL and differential routing – DPA resistance assessment

    Kris Tiri;David Hwang;Alireza Hodjat;Bo-Cheng Lai

  • Offline hardware/software authentication for reconfigurable platforms

    Eric Simpson;Patrick Schaumont

  • State-of-the-art of secure ECC implementations: a survey on known side-channel attacks and countermeasures

    Junfeng Fan;Xu Guo;Elke De Mulder;Patrick Schaumont

  • An analysis of delay based PUF implementations on FPGA

    Sergey Morozov;Abhranil Maiti;Patrick Schaumont

  • A Robust Physical Unclonable Function With Enhanced Challenge-Response Set

    Abhranil Maiti;Inyoung Kim;Patrick Schaumont

  • A Practical Introduction to Hardware/Software Codesign

    Patrick R. Schaumont

  • A methodology and design environment for DSP ASIC fixed point refinement

    R. Cmar;L. Rijnders;P. Schaumont;S. Vernalde

  • Differential Fault Intensity Analysis

    Nahid Farhady Ghalaty;Bilgiday Yuce;Mostafa Taha;Patrick Schaumont

  • Secure FPGA circuits using controlled placement and routing

    Pengyuan Yu;Patrick Schaumont

  • Design apparatus and a method for generating an implementable description of a digital system

    Patrick Schaumont;Serge Vernalde;Johan Cockx

  • End-To-End Design of a PUF-Based Privacy Preserving Authentication Protocol

    Aydin Aysu;Ege Gulcan;Daisuke Moriyama;Patrick Schaumont

  • A programming environment for the design of complex high speed ASICs

    Patrick Schaumont;Serge Vernalde;Luc Rijnders;Marc Engels

Frequent Co-Authors

Marc Engels
Marc Engels Flanders Make (Belgium)
Chao Wang
Chao Wang University of Southern California
Emmanuel Prouff
Emmanuel Prouff Apple (France)
Francesco Regazzoni
Francesco Regazzoni Polytechnic University of Milan
Lejla Batina
Lejla Batina Radboud University
Tim Güneysu
Tim Güneysu Ruhr University Bochum
Rajesh Gupta
Rajesh Gupta University of California, San Diego

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