His main research concerns Field-programmable gate array, Embedded system, Cryptography, Computer hardware and Block cipher. The Field-programmable gate array study combines topics in areas such as Computer architecture, SHA-3 and Parallel computing. His Computer architecture study incorporates themes from Reconfigurable computing, High-performance reconfigurable computing and Supercomputer.
His Embedded system research is multidisciplinary, incorporating perspectives in Cryptographic hash function and Cryptographic primitive. His study in Cryptography is interdisciplinary in nature, drawing from both Hash function and Hardware architecture. His biological study spans a wide range of topics, including Cycles per instruction and Galois theory.
Kris Gaj mostly deals with Field-programmable gate array, Embedded system, Cryptography, Computer hardware and Parallel computing. His work on Reconfigurable computing as part of his general Field-programmable gate array study is frequently connected to Throughput, thereby bridging the divide between different branches of science. His studies in Embedded system integrate themes in fields like Cryptographic hash function, IPsec, Power analysis and Encryption, Cipher.
In the subject of general Cryptography, his work in Cryptosystem is often linked to Benchmarking, thereby combining diverse domains of study. As a part of the same scientific study, Kris Gaj usually deals with the Computer hardware, concentrating on Post-quantum cryptography and frequently concerns with Key encapsulation. As part of one scientific family, he deals mainly with the area of Parallel computing, narrowing it down to issues related to the Elliptic curve, and often Elliptic curve cryptography.
His scientific interests lie mostly in Post-quantum cryptography, Field-programmable gate array, Computer hardware, Cryptography and Embedded system. The study incorporates disciplines such as Standardization, Software and Cryptosystem in addition to Post-quantum cryptography. His study explores the link between Software and topics such as Algorithm that cross with problems in Hardware architecture, Elliptic curve cryptography and Massively parallel.
His studies deal with areas such as Lookup table, Bitstream, Application-specific integrated circuit and Encryption as well as Field-programmable gate array. His work in the fields of Computer hardware, such as High-level synthesis, intersects with other areas such as Probability distribution. His research in Embedded system tackles topics such as Lightweight cryptography which are related to areas like Hardware implementations.
The scientist’s investigation covers issues in Field-programmable gate array, Embedded system, Obfuscation, Post-quantum cryptography and NIST. His work in Field-programmable gate array tackles topics such as Cryptography which are related to areas like Cipher. When carried out as part of a general Embedded system research project, his work on Hardware implementations is frequently linked to work in Test vector, therefore connecting diverse disciplines of study.
He interconnects Logic gate and Boolean satisfiability problem in the investigation of issues within Obfuscation. His Logic gate research integrates issues from Application-specific integrated circuit, Lookup table, Parallel computing, Netlist and Bitstream. Kris Gaj has included themes like Standardization and Software in his Post-quantum cryptography study.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
Very Compact FPGA Implementation of the AES Algorithm
Paweł Chodowiec;Kris Gaj.
cryptographic hardware and embedded systems (2003)
Very Compact FPGA Implementation of the AES Algorithm
Paweł Chodowiec;Kris Gaj.
cryptographic hardware and embedded systems (2003)
Cryptographic Hardware and Embedded Systems - CHES 2009
Christophe Clavier;Kris Gaj.
Lecture Notes in Computer Science (2009)
Cryptographic Hardware and Embedded Systems - CHES 2009
Christophe Clavier;Kris Gaj.
Lecture Notes in Computer Science (2009)
Comparison of the Hardware Performance of the AES Candidates Using Reconfigurable Hardware.
Kris Gaj;Pawel Chodowiec.
AES Candidate Conference (2000)
Comparison of the Hardware Performance of the AES Candidates Using Reconfigurable Hardware.
Kris Gaj;Pawel Chodowiec.
AES Candidate Conference (2000)
An embedded true random number generator for FPGAs
Paul Kohlbrenner;Kris Gaj.
field programmable gate arrays (2004)
An embedded true random number generator for FPGAs
Paul Kohlbrenner;Kris Gaj.
field programmable gate arrays (2004)
The Promise of High-Performance Reconfigurable Computing
T. El-Ghazawi;E. El-Araby;Miaoqing Huang;K. Gaj.
IEEE Computer (2008)
The Promise of High-Performance Reconfigurable Computing
T. El-Ghazawi;E. El-Araby;Miaoqing Huang;K. Gaj.
IEEE Computer (2008)
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