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D-Index & Metrics

Electronics and Electrical Engineering

D-Index
31
Citations
4460
World Ranking
6537
National Ranking
2142

Overview

Peter A. Beerel is affiliated with the University of Southern California in the United States. Their research spans multiple areas within computer science and engineering, with a particular focus on electrical and electronic engineering and artificial intelligence.

The main fields of study for Beerel include:

  • Computer Science
  • Engineering

Their subfields of study highlight a specialization in:

  • Electrical and Electronic Engineering
  • Artificial Intelligence
  • Computer Vision and Pattern Recognition
  • Hardware and Architecture
  • Atomic and Molecular Physics, and Optics

Core research topics encompass:

  • Advanced Memory and Neural Computing
  • CCD and CMOS Imaging Sensors
  • Advanced Neural Network Applications
  • Ferroelectric and Negative Capacitance Devices
  • Adversarial Robustness in Machine Learning
  • Quantum and electron transport phenomena
  • Neural dynamics and brain function

Among frequent co-authors collaborating with Beerel are:

  • Gourav Datta
  • Souvik Kundu
  • Akhilesh Jaiswal
  • Domenico Zito

Peter A. Beerel's publications have appeared extensively in venues such as:

  • arXiv (Cornell University)
  • IEEE Transactions on Circuits and Systems I Regular Papers
  • 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE)
  • IEEE Transactions on Applied Superconductivity
  • 2023 IEEE/CVF Winter Conference on Applications of Computer Vision (WACV)

Examples of recent publications include:

  • IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-I: REGULAR PAPERS, 2022, IEEE Transactions on Circuits and Systems I Regular Papers
  • Programming memristor arrays with arbitrarily high precision for analog computing, 2024, Science
  • IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-I: REGULAR PAPERS, 2022, IEEE Transactions on Circuits and Systems I Regular Papers
  • HIRE-SNN: Harnessing the Inherent Robustness of Energy-Efficient Deep Spiking Neural Networks by Training with Crafted Input Noise, 2021, 2021 IEEE/CVF International Conference on Computer Vision (ICCV)
  • IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-I: REGULAR PAPERS, 2022, IEEE Transactions on Circuits and Systems I Regular Papers

Best Publications

  • Methods and apparatus for facilitating physical synthesis of an integrated circuit design

    Peter Beerel;Andrew Lines;Qing Wu

  • A Designer's Guide to Asynchronous VLSI

    Peter A. Beerel;Recep O. Ozdag;Marcos Ferretti

  • IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS

    Sankar Basu;Guanrong Chen;Andreas G. Andreou

  • The design and verification of a high-performance low-control-overhead asynchronous differential equation solver

    K.Y. Yun;P.A. Beerel;V. Vakilotojar;A.E. Dooply

  • Speculative completion for the design of high-performance asynchronous dynamic adders

    S.M. Nowick;K.Y. Yun;P.A. Beerel;A.E. Dooply

  • High performance asynchronous ASIC back-end design flow using single-track full-buffer standard cells

    M. Ferretti;R.O. Ozdag;P.A. Beerel

  • High-performance asynchronous pipeline circuits

    K.Y. Yun;P.A. Beerel;J. Arceo

  • Automatic gate-level synthesis of speed-independent circuits

    Unknown

  • Slack matching asynchronous designs

    P.A. Beerel;A. Lines;M. Davies;Nam-Hoon Kim

  • RAPPID: an asynchronous instruction length decoder

    S. Rotem;K. Stevens;R. Ginosar;P. Beerel

  • Proteus: An ASIC Flow for GHz Asynchronous Designs

    P. A. Beerel;G. D. Dimou;A. M. Lines

  • Spike-Thrift: Towards Energy-Efficient Deep Spiking Neural Networks by Limiting Spiking Activity via Attention-Guided Compression

    Souvik Kundu;Gourav Datta;Massoud Pedram;Peter A. Beerel

  • An asynchronous instruction length decoder

    K.S. Stevens;S. Rotem;R. Ginosar;P. Beerel

  • High-speed QDI asynchronous pipelines

    R.O. Ozdag;P.A. Beerel

  • Safe BDD minimization using don't cares

    Youpyo Hong;Peter A. Beerel;Jerry R. Burch;Kenneth L. McMillan

  • Semi-modularity and testability of speed-independent circuits

    Peter A. Beerel;Teresa H.-Y. Meng

  • Efficient state classification of finite-state Markov chains

    Aiguo Xie;P.A. Beerel

  • Blade -- A Timing Violation Resilient Asynchronous Template

    Dylan Hand;Matheus Trevisan Moreira;Hsin-Ho Huang;Danlei Chen

  • Single-Track Asynchronous Pipeline Templates Using 1-of-N Encoding

    M. Ferretti;P.A. Beerel

  • Logic synthesis of multi-level domino asynchronous pipelines

    Peter Beerel;Andrew Lines;Michael Davies

  • Pipeline optimization for asynchronous circuits: complexity analysis and an efficient optimal algorithm

    Sangyun Kim;P.A. Beerel

  • Symbolic techniques for performance analysis of timed systems based on average time separation of events

    Aiguo Xie;P.A. Beerel

  • Automatic gate-level synthesis of speed-independent circuits

    Peter A. Beerel;Teresa H.-Y. Meng

  • In: "1997 IEEE International Symposium on Advanced Research in Asynchronous Circuits and Systems" ("Async97" Symposium), Eindhoven, The Netherlands Speculative Completion for the Design of High-Performance Asynchronous Dynamic Adders

    Steven M. Nowick;Kenneth Y. Yun;Peter A. Beerel;Ayoob E. Dooply

Frequent Co-Authors

Massoud Pedram
Massoud Pedram University of Southern California
Ran Ginosar
Ran Ginosar Technion – Israel Institute of Technology
Teresa H. Meng
Teresa H. Meng Stanford University
Steven M. Nowick
Steven M. Nowick Columbia University
Nobuyuki Yoshikawa
Nobuyuki Yoshikawa Yokohama National University
Luciano Lavagno
Luciano Lavagno Polytechnic University of Turin

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