2023 - Research.com Computer Science in United Kingdom Leader Award
2023 - Research.com Electronics and Electrical Engineering in United Kingdom Leader Award
2012 - Fellow of the Royal Academy of Engineering (UK)
His primary areas of investigation include Field-programmable gate array, Embedded system, Parallel computing, Reconfigurable computing and Computer hardware. Wayne Luk has included themes like Logic synthesis, Software, Speedup and Computer architecture in his Field-programmable gate array study. His Embedded system research is multidisciplinary, incorporating elements of Energy consumption, Compiler and Control reconfiguration.
His Parallel computing study combines topics from a wide range of disciplines, such as Floating point, Algorithm design, Spiking neural network and Graphics. His Reconfigurable computing research includes themes of Coprocessor, Computer engineering, Software engineering and Programming paradigm. The various areas that Wayne Luk examines in his Computer hardware study include Decoding methods, Low-density parity-check code, Unit in the last place and Gaussian noise.
Wayne Luk mainly focuses on Field-programmable gate array, Parallel computing, Embedded system, Computer architecture and Reconfigurable computing. His Field-programmable gate array study deals with Computer engineering intersecting with Convolutional neural network. His studies deal with areas such as Floating point and Computation as well as Parallel computing.
His research in Embedded system intersects with topics in Compiler and Benchmark. His Computer architecture study incorporates themes from Hardware architecture and Design space exploration. Wayne Luk is involved in the study of Software that focuses on Hardware acceleration in particular.
His primary areas of study are Field-programmable gate array, Convolutional neural network, Computer engineering, Artificial intelligence and Speedup. Wayne Luk is studying Reconfigurable computing, which is a component of Field-programmable gate array. His Convolutional neural network study combines topics in areas such as Inference, Quantization, Support vector machine, Hardware acceleration and Convolution.
Wayne Luk interconnects Process, Computation, Efficient energy use and Performance prediction in the investigation of issues within Computer engineering. His Speedup research includes elements of Algorithm, Algorithm design, Stream processing and Porting. His research investigates the connection between Computer hardware and topics such as Overhead that intersect with problems in Embedded system.
Wayne Luk mainly investigates Field-programmable gate array, Convolutional neural network, Computer engineering, Parallel computing and Artificial intelligence. He has researched Field-programmable gate array in several fields, including Artificial neural network, Computer architecture and Hardware architecture. His study on Convolutional neural network also encompasses disciplines like
Wayne Luk has included themes like Software performance testing, Kernel and Speedup in his Computer engineering study. His work in the fields of Parallel computing, such as Dataflow, intersects with other areas such as Bitonic sorter. His research integrates issues of Machine learning and Bottleneck in his study of Artificial intelligence.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
Reconfigurable computing: architectures and design methods
T.J. Todman;G.A. Constantinides;S.J.E. Wilton;O. Mencer.
IEE Proceedings - Computers and Digital Techniques (2005)
Gaussian random number generators
David B. Thomas;Wayne Luk;Philip H.W. Leong;John D. Villasenor.
ACM Computing Surveys (2007)
Accuracy-Guaranteed Bit-Width Optimization
D.-U. Lee;A.A. Gaffar;R.C.C. Cheung;O. Mencer.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2006)
M. Weinhardt;W. Luk.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2001)
A comparison of CPUs, GPUs, FPGAs, and massively parallel processor arrays for random number generation
David Barrie Thomas;Lee Howes;Wayne Luk.
field programmable gate arrays (2009)
Axel: a heterogeneous cluster with FPGAs and GPUs
Kuen Hung Tsoi;Wayne Luk.
field programmable gate arrays (2010)
Flexible instruction processor systems and methods
Wayne Luk;Peter Y. K. Cheung;Shay Ping Seng.
Comparing Three Heuristic Search Methods for Functional Partitioning in Hardware–Software Codesign
Theerayod Wiangtong;Peter Y. Cheung;Wayne Luk.
Design Automation for Embedded Systems (2002)
A hardware Gaussian noise generator using the Box-Muller method and its error analysis
D.-U. Lee;J.D. Villasenor;W. Luk;P.H.W. Leong.
IEEE Transactions on Computers (2006)
Wordlength optimization for linear digital signal processing
G.A. Constantinides;P.Y.K. Cheung;W. Luk.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2003)
If you think any of the details on this page are incorrect, let us know.
We appreciate your kind effort to assist us to improve this page, it would be helpful providing us with as much detail as possible in the text box below: