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Computer Science

D-Index
52
Citations
8499
World Ranking
5165
National Ranking
310

Electronics and Electrical Engineering

D-Index
51
Citations
8389
World Ranking
2716
National Ranking
148

Overview

Peter Y. K. Cheung is a researcher affiliated with Imperial College London in the United Kingdom. Their work spans the fields of computer science and medicine, with a focus on areas intersecting artificial intelligence, cardiology, and hardware engineering.

The main fields of study for Peter Y. K. Cheung include:

  • Computer Science
  • Medicine

Within these broad areas, their subfields of research cover:

  • Artificial Intelligence
  • Cardiology and Cardiovascular Medicine
  • Hardware and Architecture
  • Computer Vision and Pattern Recognition
  • Electrical and Electronic Engineering

The research topics addressed in their publications are diverse and include:

  • Advanced Neural Network Applications
  • Adversarial Robustness in Machine Learning
  • Atrial Fibrillation Management and Outcomes
  • VLSI and Analog Circuit Testing
  • Acute Ischemic Stroke Management
  • Blood Pressure and Hypertension Studies
  • COVID-19 diagnosis using AI

Peter Y. K. Cheung has contributed to multiple peer-reviewed journals and conferences. Their frequent publication venues include:

  • JAMA Neurology (2 publications)
  • UNC Libraries (2 publications)
  • Zenodo (CERN European Organization for Nuclear Research) (2 publications)
  • JAMA
  • PLoS Computational Biology

Some recent and notable papers authored or co-authored by Peter Y. K. Cheung are:

  • "Effect of Long-term Continuous Cardiac Monitoring vs Usual Care on Detection of Atrial Fibrillation in Patients With Stroke Attributed to Large- or Small-Vessel Disease" (2021, JAMA)
  • "Post-lockdown abatement of COVID-19 by fast periodic switching" (2021, PLoS Computational Biology)
  • "LUTNet: Learning FPGA Configurations for Highly Efficient Neural Network Inference" (2020, IEEE Transactions on Computers)
  • "Atrial Fibrillation In Patients With Stroke Attributed to Large- or Small-Vessel Disease" (2023, JAMA Neurology)
  • "Predictors of Atrial Fibrillation in Patients With Stroke Attributed to Large- or Small-Vessel Disease" (2022, JAMA Neurology)

Throughout their research career, Peter Y. K. Cheung has collaborated with several frequent co-authors, including:

  • Erwei Wang
  • James J. Davis
  • George A. Constantinides
  • Pramod Sethi
  • Javier E. Banchs

Best Publications

  • Reconfigurable computing: architectures and design methods

    T.J. Todman;G.A. Constantinides;S.J.E. Wilton;O. Mencer

  • Comparing Three Heuristic Search Methods for Functional Partitioning in Hardware–Software Codesign

    Theerayod Wiangtong;Peter Y. Cheung;Wayne Luk

  • Flexible instruction processor systems and methods

    Wayne Luk;Peter Y. K. Cheung;Shay Ping Seng

  • Wordlength optimization for linear digital signal processing

    G.A. Constantinides;P.Y.K. Cheung;W. Luk

  • Within-die delay variability in 90nm FPGAs and beyond

    Pete Sedcole;Peter K. Cheung

  • Compilation tools for run-time reconfigurable designs

    W. Luk;N. Shirazi;P.Y.K. Cheung

  • Asynchronous wrapper for heterogeneous systems

    D.S. Bormann;P.Y.K. Cheung

  • Unifying bit-width optimisation for fixed-point and floating-point designs

    A.A. Gaffar;O. Mencer;W. Luk

  • Performance Comparison of Graphics Processors to Reconfigurable Logic: A Case Study

    B. Cope;P.Y.K. Cheung;W. Luk;L. Howes

  • Floating-point bitwidth analysis via automatic differentiation

    A.A. Gaffar;O. Mencer;W. Luk;P.Y.K. Cheung

  • Enhancing Relocatability of Partial Bitstreams for Run-Time Reconfiguration

    T. Becker;W. Luk;P.Y.K. Cheung

  • A Gaussian noise generator for hardware-based simulations

    D.-U. Lee;W. Luk;J.D. Villasenor;P.Y.K. Cheung

  • Deep Neural Network Approximation for Custom Hardware: Where We've Been, Where We're Going

    Erwei Wang;James J. Davis;Ruizhe Zhao;Ho-Cheung Ng

  • Fault tolerant methods for reliability in FPGAs

    E. Stott;P. Sedcole;P. Cheung

  • Video image processing with the Sonic architecture

    S.D. Haynes;J. Stone;P.Y.K. Cheung;W. Luk

  • Degradation in FPGAs: measurement and modelling

    Edward A. Stott;Justin S.J. Wong;Pete Sedcole;Peter Y.K. Cheung

  • Customizable elliptic curve cryptosystems

    R.C.C. Cheung;N.J. Telle;W. Luk;P.Y.K. Cheung

  • Have GPUs made FPGAs redundant in the field of video processing

    B. Cope;P.Y.K. Cheung;W. Luk;S. Witt

  • Novel FPGA-based implementation of median and weighted median filters for image processing

    S.A. Fahmy;P.Y.K. Cheung;W. Luk

  • Adaptive Routing in Network-on-Chips Using a Dynamic-Programming Network

    T. Mak;P. Y. K. Cheung;Kai-Pui Lam;W. Luk

Frequent Co-Authors

Wayne Luk
Wayne Luk Imperial College London
George A. Constantinides
George A. Constantinides Imperial College London
Philip H. W. Leong
Philip H. W. Leong University of Sydney
Suhaib A. Fahmy
Suhaib A. Fahmy King Abdullah University of Science and Technology
Jan Maciejowski
Jan Maciejowski University of Cambridge
Alex Yakovlev
Alex Yakovlev Newcastle University
Steven J. E. Wilton
Steven J. E. Wilton University of British Columbia
Yiannis Andreopoulos
Yiannis Andreopoulos University College London
Yu-Kwong Kwok
Yu-Kwong Kwok Hong Kong Metropolitan University
Cheng-Zhong Xu
Cheng-Zhong Xu University of Macau

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