D-Index & Metrics Best Publications

D-Index & Metrics D-index (Discipline H-index) only includes papers and citation values for an examined discipline in contrast to General H-index which accounts for publications across all disciplines.

Discipline name D-index D-index (Discipline H-index) only includes papers and citation values for an examined discipline in contrast to General H-index which accounts for publications across all disciplines. Citations Publications World Ranking National Ranking
Computer Science D-index 94 Citations 29,447 589 World Ranking 298 National Ranking 181

Research.com Recognitions

Awards & Achievements

2020 - Fellow, National Academy of Inventors

2019 - Semiconductor Industry Association University Researcher Award

2017 - Member of the National Academy of Engineering For pioneering contributions to application-specific programmable logic via innovations in field-programmable gate array synthesis.

2008 - ACM Fellow For contributions to electronic design automation.

2001 - IEEE Fellow For contributions to the computer-aided design of integrated circuits, especially in physical design automation, interconnect optimization, and synthesis of field-programmable gate-arrays.

Overview

What is he best known for?

The fields of study he is best known for:

  • Operating system
  • Central processing unit
  • Algorithm

The scientist’s investigation covers issues in Field-programmable gate array, Embedded system, Parallel computing, Routing and Algorithm. The various areas that Jason Cong examines in his Field-programmable gate array study include Computer architecture, Electronic circuit, Application-specific integrated circuit, Lookup table and Logic synthesis. His work in Embedded system addresses subjects such as Software, which are connected to disciplines such as Scheduling.

His work in Parallel computing addresses issues such as Scalability, which are connected to fields such as Interconnection, Hierarchy, Bottleneck, Process and Computer engineering. His studies deal with areas such as Mathematical optimization, Steiner tree problem, RC time constant and Elmore delay as well as Routing. His Algorithm research is multidisciplinary, relying on both Graph, Netlist, Theoretical computer science and Benchmark.

His most cited work include:

  • Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks (1212 citations)
  • FlowMap: an optimal technology mapping algorithm for delay optimization in lookup-table based FPGA designs (627 citations)
  • High-Level Synthesis for FPGAs: From Prototyping to Deployment (527 citations)

What are the main themes of his work throughout his whole career to date?

Jason Cong mostly deals with Field-programmable gate array, Parallel computing, Embedded system, Algorithm and Routing. His Field-programmable gate array research incorporates elements of Lookup table, Logic synthesis, Computer architecture and Speedup. His work deals with themes such as Scheduling, Scalability, Interconnection and Electronic circuit, which intersect with Parallel computing.

The various areas that Jason Cong examines in his Embedded system study include Software, Efficient energy use and Multi-core processor. The Algorithm study combines topics in areas such as Very-large-scale integration and Mathematical optimization, Minification. Much of his study explores Routing relationship to Steiner tree problem.

He most often published in these fields:

  • Field-programmable gate array (34.12%)
  • Parallel computing (24.49%)
  • Embedded system (19.43%)

What were the highlights of his more recent work (between 2015-2021)?

  • Field-programmable gate array (34.12%)
  • Embedded system (19.43%)
  • Parallel computing (24.49%)

In recent papers he was focusing on the following fields of study:

His primary areas of investigation include Field-programmable gate array, Embedded system, Parallel computing, Speedup and Software. Particularly relevant to High-level synthesis is his body of work in Field-programmable gate array. His High-level synthesis research is multidisciplinary, incorporating elements of Correctness and Benchmark.

His Embedded system study deals with Dram intersecting with Cache. The study incorporates disciplines such as Systolic array, Compiler and Stencil in addition to Parallel computing. The concepts of his Speedup study are interwoven with issues in Memory hierarchy and Artificial intelligence.

Between 2015 and 2021, his most popular works were:

  • Caffeine: towards uniformed representation and acceleration for deep convolutional neural networks (236 citations)
  • Automated Systolic Array Architecture Synthesis for High Throughput CNN Inference on FPGAs (197 citations)
  • Scaling for edge inference of deep neural networks (155 citations)

In his most recent research, the most cited papers focused on:

  • Operating system
  • Central processing unit
  • Programming language

Field-programmable gate array, Embedded system, Parallel computing, Efficient energy use and Computer architecture are his primary areas of study. His Field-programmable gate array research is multidisciplinary, incorporating perspectives in Latency, Computer engineering, Key, Bottleneck and Computation. Jason Cong interconnects Automation and Software in the investigation of issues within Embedded system.

His Parallel computing study integrates concerns from other disciplines, such as Scalability and Porting. His Efficient energy use study combines topics in areas such as Distributed computing, Computational complexity theory, Cluster, Dynamic programming and FPGA prototype. His Computer architecture research incorporates themes from High-level synthesis and Artificial neural network, Deep learning, Convolutional neural network, Artificial intelligence.

This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.

Best Publications

Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks

Chen Zhang;Peng Li;Guangyu Sun;Yijin Guan.
field programmable gate arrays (2015)

1830 Citations

FlowMap: an optimal technology mapping algorithm for delay optimization in lookup-table based FPGA designs

J. Cong;Yuzheng Ding.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1994)

986 Citations

High-Level Synthesis for FPGAs: From Prototyping to Deployment

Jason Cong;Bin Liu;Stephen Neuendorffer;Juanjo Noguera.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2011)

858 Citations

A thermal-driven floorplanning algorithm for 3D ICs

J. Cong;Jie Wei;Yan Zhang.
international conference on computer aided design (2004)

535 Citations

Caffeine: Toward Uniformed Representation and Acceleration for Deep Convolutional Neural Networks

Chen Zhang;Guangyu Sun;Zhenman Fang;Peipei Zhou.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2019)

468 Citations

Performance optimization of VLSI interconnect layout

Jason Cong;Lei He;Cheng-Kok Koh;Patrick H. Madden.
Integration (1996)

419 Citations

CMP network-on-chip overlaid with multi-band RF-interconnect

M.F. Chang;J. Cong;A. Kaplan;M. Naik.
high-performance computer architecture (2008)

345 Citations

Minimizing Computation in Convolutional Neural Networks

Jason Cong;Bingjun Xiao.
international conference on artificial neural networks (2014)

343 Citations

Automated Systolic Array Architecture Synthesis for High Throughput CNN Inference on FPGAs

Xuechao Wei;Cody Hao Yu;Peng Zhang;Youxiang Chen.
design automation conference (2017)

312 Citations

Application-specific instruction generation for configurable processor architectures

Jason Cong;Yiping Fan;Guoling Han;Zhiru Zhang.
field programmable gate arrays (2004)

307 Citations

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