World's Best Scientists 2026 revealed!

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
41
Citations
5985
World Ranking
4337
National Ranking
1537

Overview

Jiang Hu is affiliated with Texas A&M University in the United States. Their research spans key areas within engineering and computer science, with particular emphasis on electrical and electronic engineering and hardware and architecture. The scientist's work has also contributed to fields such as artificial intelligence, industrial and manufacturing engineering, and computer vision and pattern recognition.

The main topics of Jiang Hu's work include:

  • VLSI and FPGA Design Techniques
  • VLSI and Analog Circuit Testing
  • Low-power high-performance VLSI design
  • Integrated Circuits and Semiconductor Failure Analysis
  • Physical Unclonable Functions (PUFs) and Hardware Security
  • Manufacturing Process and Optimization
  • Security and Verification in Computing

Jiang Hu has a significant publication record in both journals and conferences. Frequent publication venues for their work include:

  • arXiv (Cornell University)
  • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • ACM Transactions on Design Automation of Electronic Systems
  • Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design
  • 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD)

Among recent papers authored or coauthored by Jiang Hu are:

  • "Short-term air quality prediction based on EMD-transformer-BiLSTM," 2024, Scientific Reports
  • "Deep Reinforcement Learning-Based Irrigation Scheduling," 2020, Transactions of the ASABE
  • "Preplacement Net Length and Timing Estimation by Customized Graph Neural Network," 2022, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • "Radiology-Llama2: Best-in-Class Large Language Model for Radiology," 2023, arXiv (Cornell University)
  • "Automatic Routability Predictor Development Using Neural Architecture Search," 2021, 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD)

Jiang Hu frequently collaborates with several coauthors, including:

  • Yiran Chen
  • Zhiyao Xie
  • Chen-Chia Chang
  • Jingyu Pan
  • Rongjian Liang

Best Publications

  • A practical methodology for early buffer and wire resource allocation

    C.J. Alpert;Jiang Hu;S.S. Sapatnekar;P.G. Villarrubia

  • Gate Sizing for Cell-Library-Based Designs

    Shiyan Hu;M. Ketkar;Jiang Hu

  • Combinatorial Algorithms for Fast Clock Mesh Optimization

    G. Venkataraman;Zhuo Feng;Jiang Hu;Peng Li

  • Porosity-aware buffered Steiner tree construction

    C.J. Alpert;G. Gandham;M. Hrkic;Jiang Hu

  • Reducing clock skew variability via crosslinks

    A. Rajaram;Jiang Hu;R. Mahapatra

  • A New Algorithm for Simultaneous Gate Sizing and Threshold Voltage Assignment

    Yifang Liu;Jiang Hu

  • RouteNet: routability prediction for mixed-size designs using convolutional neural network

    Zhiyao Xie;Yu-Hung Huang;Guan-Qi Fang;Haoxing Ren

  • A survey on multi-net global routing for integrated circuits

    Jiang Hu;Sachin S. Sapatnekar

  • Joint precision optimization and high level synthesis for approximate computing

    Chaofan Li;Wei Luo;Sachin S. Sapatnekar;Jiang Hu

  • A practical methodology for early buffer and wire resource allocation

    Charles J. Alpert;Jiang Hu;Sachin S. Sapatnekar;Paul Villarrubia

  • Reducing clock skew variability via cross links

    Anand Rajaram;Jiang Hu;Rabi Mahapatra

  • Fast Algorithms for Slew-Constrained Minimum Cost Buffering

    Shiyan Hu;C.J. Alpert;Jiang Hu;S.K. Karandikar

  • In-network monitoring and control policy for DVFS of CMP networks-on-chip and last level caches

    Xi Chen;Zheng Xu;Hyungjun Kim;Paul Gratz

  • A timing-constrained algorithm for simultaneous global routing of multiple nets

    Jiang Hu;Sachin S. Sapatnekar

  • Method and system for re-routing interconnects within an integrated circuit design having blockages and bays

    Charles Jay Alpert;Rama Gopal Gandham;Jiang Hu;Jose Luis Neves

  • Machine Learning-Based Pre-Routing Timing Prediction with Reduced Pessimism

    Erick Carvajal Barboza;Nishchal Shukla;Yiran Chen;Jiang Hu

  • Buffered Steiner trees for difficult instances

    C. J. Alpert;Miloš Hrkić;J. Hu;A. B. Kahng

  • The Cat and Mouse in Split Manufacturing

    Yujie Wang;Pu Chen;Jiang Hu;Guofeng Li

  • Standard cell characterization considering lithography induced variations

    Ke Cao;Sorin Dobre;Jiang Hu

  • The cat and mouse in split manufacturing

    Yujie Wang;Pu Chen;Jiang Hu;Jeyavijayan J V Rajendran

  • DRC Hotspot Prediction at Sub-10nm Process Nodes Using Customized Convolutional Network

    Rongjian Liang;Hua Xiang;Diwesh Pandey;Lakshmi Reddy

  • Dynamic voltage and frequency scaling for shared resources in multicore processor designs

    Xi Chen;Zheng Xu;Hyungjun Kim;Paul V. Gratz

  • Combinatorial algorithms for fast clock mesh optimization

    Ganesh Venkataraman;Zhuo Feng;Jiang Hu;Peng Li

  • Noise-Aware DVFS for Efficient Transitions on Battery-Powered IoT Devices

    Cheng Zhuo;Shaoheng Luo;Houle Gan;Jiang Hu

  • INVITED: ALIGN – Open-Source Analog Layout Automation from the Ground Up

    Kishor Kunal;Meghna Madhusudan;Arvind K. Sharma;Wenbin Xu

Frequent Co-Authors

Sachin S. Sapatnekar
Sachin S. Sapatnekar University of Minnesota
Charles J. Alpert
Charles J. Alpert Cadence Design Systems
Jeyavijayan Rajendran
Jeyavijayan Rajendran Texas A&M University
Edgar Sanchez-Sinencio
Edgar Sanchez-Sinencio Texas A&M University
Ramesh Harjani
Ramesh Harjani University of Minnesota
Umit Y. Ogras
Umit Y. Ogras University of Wisconsin–Madison
Yao-Wen Chang
Yao-Wen Chang National Taiwan University
Tong Zhang
Tong Zhang Rensselaer Polytechnic Institute
Cheng-Kok Koh
Cheng-Kok Koh Purdue University West Lafayette
Jose Silva-Martinez
Jose Silva-Martinez Texas A&M University

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